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Altera_Forum
Honored Contributor I
1,072 Views

Nios 2 won't run a new software configuration

Hello, 

I'm experiencing a problem when trying to modify a NIOS 2 based project.  

The situation stands as follows: I have a working project wrote on a flash. When I try to modify the software, and click on RUN AS Nios 2 HW, the NIOS resets, but runs the same old configuration from the flash :(. 

 

Furthermore, when playing with another similar board, but having on it's flash an older version of HW & SW, I can run a new SW version o any EVEN attempt :mad:. On odds ones, it runs the same old Sw from the flash. 

 

I'm using NIOS/Quartus 9.0. The active system library properties settings are: Program never exits, Lightweight API, Reduced device drivers, Small C library. I've tried recompiling the project from scratch(all steps from SOPC to NIOS project Build). 

 

Had anyone experienced something like this? 

 

Have a nice day.
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6 Replies
Altera_Forum
Honored Contributor I
56 Views

Hi, Your Reset vector is at the begining of the flash. Good thing. 

 

Don't use "reset after programming option" when you download. 

 

Do you download via the GUI or via the command line ?
Altera_Forum
Honored Contributor I
56 Views

Hi, 

Yes, the reset vector is set to the flash. 

I'm downloading from GUI. In version 9.0 of NIOS I don't really know where is the "reset after programming option" (I will search it), but i presume that it is disabled because I previously managed to modify the software in "real-time". 

 

Thanks for your quick reply.
Altera_Forum
Honored Contributor I
56 Views

Do you use the remote update component or anything else involving a watchdog timer? 

Is the fpga configuration stored in flash the same as the one you are supposed to use with the modified Nios sw? Or did you change fpga design, too?
Altera_Forum
Honored Contributor I
56 Views

The design is using a watchdog timer, but it is handled the same way in any software versions. The only thing I modify is some delays and command given to others SOPC components. 

The fpga configuration is the same on both hw, the only think that is changed is the time-stamp(multiple Regenerations and Recompilations, in lack of other ideas). 

 

For example: I have a hw(i won't modify it anymore) and sw version with a delay of 2s for a LED. If I put this on the flash, and reset the board by power off/on, the configuration runs. If I modify the delay with let's say 20s and RUN AS this new sw, the LED is powered on after 2s. If a put the sw version with 20s delay on flash and restart the board, it runs correctly. 

If I have another hw & sw versions stored on flash, and put the new hw with Quartus programmer, I may run successfully a new sw version on EVEN attempts.
Altera_Forum
Honored Contributor I
56 Views

Then, I guess the watchdog is responsible of the behaviour you observe. 

When you power up the board, the design from flash is loaded and this enables the watchdog timer. 

When you try loading the updated software with "Run As", Nios is momentarily stopped and the watchdog timeouts, thus triggering a reset and forcing a reload from flash. 

This would also explain the even-good / odd-fault behaviour. On the first RunAs attempt the watchdog triggers a reset, but in this condition the software probably restarts with a disabled watchdog. Then, the next RunAS succeeds with the updated software, which conversely re-enables the watchdog timer.
Altera_Forum
Honored Contributor I
56 Views

Thank you for your answer. I disabled the watchdog, rewrite the flash, and after this I can RunAs at any time.

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