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Nios II Ethernet Standard Design Example - Missing triple_speed_ethernet

Altera_Forum
Honored Contributor II
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Hi, 

 

I downloaded the Nios II Ethernet Standard Design Example (https://www.altera.com/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-net-std-de.html) the 5cgtfd9e version. 

 

When I open it in Quartus II 15.0 the ethernet_system.qsys file, it states that the tse_mac is missing. I assume I just replace it with the usual Triple-Speed Ethernet core, but what are the parameters for this core. 

 

Thanks, 

 

Jack
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Altera_Forum
Honored Contributor II
388 Views

Man, Did you try out the readme file procedure/special modification? 

 

Readme for Cyclone V Ethernet Standard design example: 

 

 

Readme.txt:- 

 

This design is target to Cyclone V GT development board, Rev A. This design supports Quartus II 12.1SP1. 

 

You can program the prebuilt SOF image comes with the zip file to the development board. For ethernet applications, you can create simple socket server or web server software projects in Nios II SBT for Eclipse. 

 

This design is Qsys hierarchy based hence the components are in hierarchy names. You would need to modify the tse_my_system.c file in the simple socket server or web server project as following: 

 

From: 

 

alt_tse_system_info tse_mac_device[MAXNETS] = { 

TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO(TSE_MAC, 0, SGDMA_TX, SGDMA_RX, TSE_PHY_AUTO_ADDRESS, &marvell_cfg_rgmii, DESCRIPTOR_MEMORY) 

 

}; 

 

To: 

 

alt_tse_system_info tse_mac_device[MAXNETS] = { 

TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO(ETHERNET_SUBSYSTEM_TSE_MAC, 0, ETHERNET_SUBSYSTEM_SGDMA_TX, ETHERNET_SUBSYSTEM_SGDMA_RX, TSE_PHY_AUTO_ADDRESS, &marvell_cfg_rgmii, ETHERNET_SUBSYSTEM_DESCRIPTOR_MEMORY) 

 

};
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Altera_Forum
Honored Contributor II
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so is this one working for you?

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