Hello all,I'm a newbie of Altera and Altera Products. I'm working on Altera Stratix II DSP Development Board StratixII EP2S180 kit using Quartus II 9.0 and all the related products to this version. My machine is a Dell PowerEdge T110 (Xeon 8 core) with Windows Server 2008 R2. All are working perfectly. As indicated in the title I need some answers about how the flash programmer works. I've spent a lot of time reading the "Nios II Flash Programmer User Guide" and doing the "Nios II Hardware Development Tutorial" but there are something that I still can't understand. To transfer a file (for example the my_first_fpga_top.sof of the tutorial) to the flash memory I need a complete Nios II system running on the FPGA and then, using the flash programmer, I can transfer this file to flash memory. So, I open the Nios II 9.0 IDE and then Tools->Quartus II Programmer. Using the file "altera_dsp_dev_board_stratix_2s180.sof" located "Altera\Kits\StratixII_DSP_Kit-v6.0.1\Components\altera_dsp_dev_board_stratix_2s180\system" I program the FPGA. Then, Tools->Flash Programmer. The configuration is visible on the attached photo. Clicking on "Program flash" the process starts. After fews seconds I got the error showed in the second photo. This procedure is what I learned reading and studying the Altera tutorial, but there's something wrong and I don't understand what is it. Thank for every replay and help. bye bye L.
Please post the output of `jtagconfig --debug` after programming the sof into the device.Please also confirm that your design meets timing (ie you did not get any critical warnings or errors during synthesis). Designs which fail timing are often a source of weird errors later
Where can I find the output of "jtagconfig --debug"? From the console of Nios II shell?About the second request, I'm using a .sof file provided by Altera for my specific board so I'm not going through the compilation process. The only file that I've created is the one that I want transfer to the flash memory. Thank you bye L.