04-04-2013 11:14 AM
Hi,I am trying to implement a Nios on my custom board. The nios is simple: - external clock 30MHz - external reset_n (alt_pll_locked signal) - nios II processor /s - onchip memory: 131072 bytes - sysid - jtag_uart - pio output 32bit initialize at 0x00000000 - custom driver (avalon mapped slave) I have checked on the board both clock and reset_n signals (they are use and work for other vhd modules). I written a simple program: alt_printf("hello") + IOWR(pio_base, 0, 0xFFFFFFFF) to test the nios but it doesn't work. The nios seems to be always in reset state: -> I can program the nios using "nios2-download -r file.elf" command -> I can open a jtag uart using nios2-terminal.exe But both printf() and PIO have no effect on fpga and jtag_uart. -> sysid and timestamp are "not found" so I can't go in debug mode. I have set BSP_editor settings (no small drivers, boot and run from onchip memory, enable sysid check, set sys_clk_timer, jtag_uart streams...) I never had this problem before but it is the first nios I build with Quartus 11.1 sp2. Maybe I forgot something simple but I have no clue :-/ Any idea ? Thanks for help :-) seb
04-04-2013 12:11 PM
--- Quote Start --- sysid and timestamp are "not found" --- Quote End --- this is strange, especially if the download part works. Are you sure the BSP is made with the correct .sopcinfo file and uses the correct addresses for the sysid component? You can also try and use Systemconsole to directly read and write registers in your system and access to the sysid component manually.
04-04-2013 03:27 PM
thanks for answers, it was an IDE problem I think.I try with nios IDE 11.0sp1 and sysid was detected well in "run configuration menu". I try again with nios II 11.1sp2 and sysid was found but wrong. After several times without changing nothing now it works... Altera software mysteries !