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Nios ii Instruction Macros

Altera_Forum
Honored Contributor II
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Can anyone explain to me how macros of the nios ii instructions (addi, subi, movi, ...) are interpreted in computer system vhd file? 

Do their entities and definitions exist in the vhd file of the whole nios ii system? 

 

Thanks in advance.
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Altera_Forum
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Just like in any other processor. All of those commands have their opcode. E.g. move - 001, add 010, jmp 011, etc... Analyze any software core and You'll see.

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Altera_Forum
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When we are designing a custom instruction in nios ii processor, we add our HDL file that includes the signals for inputs and result(output) _which defines the entity of the instruction_ to the processor. 

1.Is there such entities for nios ii instruction somewhere in nios system vhd file? 

2.How a macro works for custom instruction then?
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Altera_Forum
Honored Contributor II
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The internals of the cpu are encrypted and hidden. 

You can see the logic of the custom instruction decoder and mux in one of the randon windows during synthesis. 

 

Basically all the instruction logic blocks are given the entire input info (32bit instruction word and two 32bit register values), calculate their result, and a big mux selects the correct result and 'write-back' enable.
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Altera_Forum
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What is the role of macros? how macros are interpreted by macroprocessor?

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Altera_Forum
Honored Contributor II
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What do you mean by 'macros'?

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Altera_Forum
Honored Contributor II
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When we try to run an application program on Altera Monitor Program, there should be a file (written in macroprocessor language) included i main program that defines the instructions we have used in main program. 

 

For example "nios_macros.s": 

 

 

--- Quote Start ---  

.ifndef _nios2_macros_  

.equ _nios2_macros_,1  

 

# --------------------  

# GEQU symbol, value  

#  

# Macro to define a global symbol  

.macro GEQU sym,val  

.global \sym  

.equ \sym,\val  

.endm  

 

# --------------------  

# GFUNC symbol  

#  

# Macro to define a global function  

.macro GFUNC sym  

.global \sym  

.type \sym, @function  

\sym:  

.endm  

 

# --------------------  

# MOVI32 $reg, imm32  

#  

# Macro to move a 32-bit immediate into a register.  

.macro MOVI32 reg, val  

movhi \reg, %hi(\val)  

ori \reg, \reg, %lo(\val)  

.endm  

 

# --------------------  

# MOVIA $reg, address  

#  

# Macro to move a 32-bit address into a register.  

.macro MOVIA reg, addr  

movhi \reg, %hi(\addr)  

ori \reg, \reg, %lo(\addr)  

.endm  

 

# +----------------------------  

# | MOVIK32 reg,value  

# |  

# | for constants only, no linker action  

# | uses only one instruction if possible  

# |  

 

.macro MOVIK32 _dst,_val  

.if (\_val & 0xffff0000) == 0  

MOVUI \_dst,%lo(\_val)  

.elseif (\_val & 0x0000ffff) == 0  

MOVHI \_dst,%hi(\_val)  

.else  

MOVHI \_dst,%hi(\_val)  

ORI \_dst,\_dst,%lo(\_val)  

.endif  

.endm  

 

 

.endif# _nios2_macros_  

 

# end of file  

--- Quote End ---  

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Altera_Forum
Honored Contributor II
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Those are expanded by the assembler - gas. 

The standard opcodes are compiled into the assembler itself.
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Altera_Forum
Honored Contributor II
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I still don't understand how macros are related to instruction, what is the relation between them? 

Also how can I see the entities of the instructions inside the Nios CPU?
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Altera_Forum
Honored Contributor II
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I still don't see why you have a problem.... 

Those gas macros convert assembly source lines into ones that gas itself understands. gas generates an object file containing the numeric instructions. The cpu logic is controlled by the instructions. 

This is what happens for any cpu. 

 

Altera encrypt the internals of the cpu so that it can't be copied, quite a lot of the operation can be inferred from the instruction set and instruction timings.
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Altera_Forum
Honored Contributor II
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You mean I cannot see how the instruction say for example addi is structured in the CPU?

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Altera_Forum
Honored Contributor II
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Is it true that the only possible way to customize the Nios ii processor is creating custom instructions? Is there any other way?

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Altera_Forum
Honored Contributor II
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It depends on what you call customize. Outside the CPU you can also create components that implement a hardware acceleration. Altera has an example of this here (http://www.altera.com/support/examples/nios2/exm-checksum-acc.html).

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Altera_Forum
Honored Contributor II
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Thank you for the provided link. 

A meaning by saying customizing could be designing those MIPS' instructions that are not provided in the Nios ii processors' ALU...
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