As stated in many Altera documentation, Cyclone V SoC (E, GX, SE, and SX) has support for partial reconfiguration through FPP x16 configuration interface.
Altera also says that: “You can design your system for CvP and partial reconfiguration. Partial reconfiguration is an advanced feature. If you are interested in using partial reconfiguration, contact Altera for support.”
First, is there anyone over there using this "Altera Cyclone V SoC Development Kit (DK-DEV-5CSXC6N)" for partial reconfiguration? Or any Cyclone V SoC…?
Second, which documentation/guidelines are you using for doing partial reconfiguration projects for Cyclone V SoC?
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regards,
icegreen
