Hi,in this post http://www.alteraforum.com/forum/showthread.php?t=19366 (http://www.alteraforum.com/forum/showthread.php?t=19366) we already talked a little bit about pointer access to an avalon component address. I don't want to use this in my design, i just would like to understand why it works at all. If i have something like this volatile alt_u32 ptr = (alt_u32 *)COMPONENT_BASE; - whereas COMPONENT_BASE is the base address of a component from system.h - then I can use the pointer to read the value at that address like that: alt_u32 value = *ptr; This I fully understand. What i don't understand is why this kind of access to the component also creates a "read" signal on the avalon bus. I would have thought that the main purpose of using the IORD(COMPONENT_BASE, 0) macro must be to trigger all according signals on the avalon bus. Can somebody please explain what is going on behind the scenes and what is the difference between the pointer access and the usage of the IORD macro? Thanks, Maik
The IORD macro ensures that the data cache is bypassed, which is usually what you need when you access hardware.With the pointer access, the CPU will first check if the value is in the data cache. If it is, it will get the cached value without doing any read operation on the Avalon bus. If it isn't, it will read it the same way than IORD does (or to be more precise, it can read several addresses in a burst to fill a complete cache line). Usually with hardware, the registers contents can change without the CPU noticing, so you don't want to cache the values.
Wow,very short answer but totally clear now. Maybe this will pretend me from doing mistakes I wouldn't have known about. Thank you! Maik