Have a design that am trying to optimize the power on.
Device is Arria II GX 125 C4 part. I am using 9.1 Quartus.
Running Power play analyzer and setting toggle rate to 50% I get a number
and that is 5.44W total with 3.66W being core dynamic power.
Running and following the advisor the following were done:
Synthesis: Powerplay optimization : Extra Effort
Fitter: Powerplay optimization : Extra Effort
Synthesis: Optimization Technique : Area
Synthesis: Perform WYSIWYG primitive resynth
I made sure that incremental compilation is off.
For now I am just caring about power deltas and not about getting the
most accurate absolute power consumption.
Problem is that for all these "advisor" recommendations there was very
little change in power consumption after full build and re-running
Power play analyzer. After all the changes above the power reduced
from 5.44W total to 5.169W - not as significant as some documentation
would suggest is possible.
Kinda new to this software power optimization so looking for a direction to travel
towards the end goal which is optimal power reduction and would like to spend
time wisely working towards the biggest opportunities for reduction first.
No question, I have some vhdl work to do to optimally reduce but just trying
to understand what the software can do for me first.
All advise welcome.
Regards,
Cos.
