Hi All,I'm working on a custom board - assembled with Arria 5 that boot from QSPI. When i power on my board I can see on the tera term the peloader printouts ,but after preloader finishe his work and try to read out the uboot from QSPI to DDR - it face some difficulties. below are the printouts ( with the errors ) from the UART0 termial : CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 800 MHz CLOCK: DDR clock 532 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 488 KHz CLOCK: QSPI clock 400000 KHz RESET: WARM INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 1024 MiB SDRAM: Scrubbing 0x01000000 - 0x02000000 SDRAM: Scrubbing success with 22 ms SDRAM: Scrubbing 0x00000000 - 0x01000000 SDRAM: Scrubbing 0x02000000 - 0x40000000 SDRAM: ECC Enabled SF: Read data capture delay calibrated to 7 (0 - 15) SF: Unsupported manufacturer ff SPI probe failed.# ## ERROR# ## Please RESET the board# ## Please advise, Thanks Moran.
hi there is some investigation needed at your qspi flash part, as it failed to detect that. any pull up register or hard configuration you have acidentally missed out?
Hi,I'm pretty sure this is because the U-Boot port on which this preloader is based upon does not fully support this flash. As seen in the datasheet, the bit EXTADD of the Bank Address Register is set to 0 by default, and this means that the FAST_READ (0Bh) command used by U-Boot expects to be followed by a 3-byte address, but since the device is > 16 MB, U-Boot automatically uses a 4-byte address! So the preloader copies garbage to the DDR, and then tries to run it, the watchdog is triggered, and so on... There is also a similar problem related to the Normal or Quad operation. The changes are not too difficult to implement, but actually Altera pushed last week a commit that adds this support! So, you can take a look at this commit, and see if it solves your problem: https://github.com/altera-opensource/u-boot-socfpga/commit/5a47f31c98e6c70185f3423bc82f3414cb25ca2c replace the spansion.c file with the spansion.c file present in above link I too faced this problem.my problem solved after replacing the file