Progrmming the EPCS device

[Altera_Forum]

Hi NIOS users / experts, 

  Our application has to update the content of EPCS device (both FPGA and application codes) dynamically. Therefore I am looking for documentation about how we can update the content of the EPCS device. After reading the NIOS documentation (Chapter 14. Serial Configuration Devices), I still do not have any idea how to start. I have some (maybe silly) questions (hoping someone has an answer): 1. What is the format of the image file (FPGA and application codes), stored on the EPCS device? 2. Should I program the flash myself directly or thru the EPCS device? 3. Are there more documentations?  Any help is welcome!  Thanks in advance!  Regards,  Kwok Wong

[Altera_Forum]

First, be careful when upgrading the EPCS dynamically because there is no multi-region available and then you can not have User and Factory like structure. Then, if the transfert fails, your EPCS might be corrupted and your board will be dead. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ph34r.gif  

  I will advice you to use a local memory in which you will transfert the contents (external SRAM or SDRAM). Once the transfer into the local memory is completed, do erase and rewrite the entire EPCS. Be sure that no power down will occur. Again, you could get a piece of wood http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif .   Otherwise, HAL provides you with sufficient driver to erase and write into the EPCS. EPCS is just a serial Flash. You should be able to implement your own mecanism upgrading the EPCS.   Maga

[Altera_Forum]

--- Quote Start ---  originally posted by maga@Nov 16 2004, 01:00 PM first, be careful when upgrading the epcs dynamically because there is no multi-region available and then you can not have user and factory like structure. then, if the transfert fails, your epcs might be corrupted and your board will be dead. http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/ph34r.gif    i will advice you to use a local memory in which you will transfert the contents (external sram or sdram). once the transfer into the local memory is completed, do erase and rewrite the entire epcs. be sure that no power down will occur. again, you could get a piece of wood  http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/smile.gif .   otherwise, hal provides you with sufficient driver to erase and write into the epcs. epcs is just a serial flash. you should be able to implement your own mecanism upgrading the epcs.   maga  --- Quote End ---   Thank you for your reply. I now know I have to use the HAL flash API to program &#39;things&#39;.  Yes, we do recognize the risks. Since we can not use the JTAG to program our product, after it is manufacutred and delivered (being in operation), software (FPGA and/or application codes) download (into RAM) and then program it to the serial Flash is the ONLY option.  I assume that I have to use one or more of the following build output files: 1. epcs.flash 2. epcs_controller_boot_rom.flash 3. our_application.elf  4. nios2_quartus2_project.sof (FPGA contents ??)  The programs I am facing are that I don&#39;t know how to interpret these mentioned files.  I am hoping that someone has done this before. So I don&#39;t have to invent the wheel again.

[Altera_Forum]

If you have a look in the *.flash, you will notice that&#39;s SREC format which is not so hard to handle in C. There are some good documentation on the WEB to know how the SREC format is build. (http://pmon.groupbsd.org/info/srec.htm) http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/rolleyes.gif  

 S<type><length><address><data....><checksum>   Maga

[Altera_Forum]

Thank you Maga , again. 

 However (as mentioned in an ealier message), there are at least three flash files: epcs.flash, epcs_controller_boot_rom.flash ext_flash.flash.  In the past (som ten years ago) I did work with S-records. So interpretin the S-records will not be the problem (I hope). The big questions are: 1. Which file do I need to use? 2. Should I just erae and write all of the data in the flash file onto the flash device?  Regards,  Kwok Wong

[Altera_Forum]

--- Quote Start ---  originally posted by kwokwong@Nov 16 2004, 04:37 AM hi nios users / experts,   our application has to update the content of epcs device (both fpga and application codes) dynamically. ................ 2. should i program the flash myself directly or thru the epcs device? 3. are there more documentations?  any help is welcome!  thanks in advance!  regards,  kwok wong  --- Quote End ---    in altera document: &#39;NIOS II SOFTWARE DEVELOPER&#39;S HANDBOOK (n2sw_nii5v2.pdf)&#39; you&#39;ll find on page 4-12 (Using Flash Devices) what you&#39;re looking for. But there is obviously an error by altera in handling the data: I use &#39;alt_read_flash()&#39; from EPCS and the resulting data are bit-swapped! (LSB <-> MSB)  Mike

[Altera_Forum]

The problem is NOT to read/write thru the epcs controller. 

I CAN do that. The problem is that I don&#39;t know to where I should write the the various .flash files to. I figured out that the epcs.flash contains the FPGA configuartion and I can write it to starting at address 0. (am I right?). I figured out (I maybe wrong) that the epcs_controller_boot_rom.flash - as outout of elf2flash - the application including the boot loader (from flash to RAM).  I have compared the content of the epcs.flash with data starting from address 0 and they match to each other.  However I could find the contents of epcs_controller_boot_rom.flash in the flash.   who helps?  Regards,  Kwok Wong

[Altera_Forum]

--- Quote Start ---  originally posted by kwokwong@Dec 14 2004, 09:00 AM ...... i figured out that the epcs.flash contains the fpga configuartion and i can write it to starting at address 0. (am i right?). i figured out (i maybe wrong) that the epcs_controller_boot_rom.flash - as outout of elf2flash - the application including the boot loader (from flash to ram). i have compared the content of the epcs.flash with data starting from address 0 and they match to each other. however i could find the contents of epcs_controller_boot_rom.flash  in the flash.  --- Quote End ---    Hi Kwok Wong,  when you compile and link your software NIOS II IDE creates &#39;epcs_controller_boot_rom.flash&#39;. This file contains only your software. This is done by blocks starting with 32-Bit Length and 32-bit-Load-Address followed by as many data words as specified in the Length field (in bytes). These blocks are placed in the data fields of the S-records. In my design, I chose the block containing RAM data, load it to the RAM address and jump to the address, the last block (with length field = 0) provided in its address field. (And it works).  When you run Tools->Flash Programmer (in NIOS II IDE) you have to select a configuration, specified in your custom board design together with a reference designator (in the last drop down box). Obviously you have named this configuration &#39;epcs&#39; because the file &#39;epcs.flash&#39; is created. This file is much more larger and contains ( I think) all: boot loader, firmware and FPGA configuration. But I couldn&#39;t figure out how the original data are merged together.   As cyclone devices accept compressed configuration data, is it possible that all data bytes are automatically compressed then ?  Mike

[Altera_Forum]

--- Quote Start ---  originally posted by mir+dec 15 2004, 03:28 am--><div class='quotetop'>quote (mir @ dec 15 2004, 03:28 am)</div>  --- quote start ---  <!--quotebegin-kwokwong@Dec 14 2004, 09:00 AM  ...... i figured out that the epcs.flash contains the fpga configuartion and i can write it to starting at address 0. (am i right?). i figured out (i maybe wrong) that the epcs_controller_boot_rom.flash - as outout of elf2flash - the application including the boot loader (from flash to ram). i have compared the content of the epcs.flash with data starting from address 0 and they match to each other. however i could find the contents of epcs_controller_boot_rom.flashâ  in the flash.  --- Quote End ---    Hi Kwok Wong,  when you compile and link your software NIOS II IDE creates &#39;epcs_controller_boot_rom.flash&#39;. This file contains only your software. This is done by blocks starting with 32-Bit Length and 32-bit-Load-Address followed by as many data words as specified in the Length field (in bytes). These blocks are placed in the data fields of the S-records. In my design, I chose the block containing RAM data, load it to the RAM address and jump to the address, the last block (with length field = 0) provided in its address field. (And it works).  When you run Tools->Flash Programmer (in NIOS II IDE) you have to select a configuration, specified in your custom board design together with a reference designator (in the last drop down box). Obviously you have named this configuration &#39;epcs&#39; because the file &#39;epcs.flash&#39; is created. This file is much more larger and contains ( I think) all: boot loader, firmware and FPGA configuration. But I couldn&#39;t figure out how the original data are merged together.   As cyclone devices accept compressed configuration data, is it possible that all data bytes are automatically compressed then ?  Mike [/b]  --- Quote End ---   Hi,  I have compared the the epcs.flash and epcs_controller_boot_rom.flash with the EPCS serial flash content. The epcs.flash (FPGA configuration data) matches with the EPCS flash contents. However the size of the stored appliation data is smaller than the data in the epcs_controller_boot_rom.flash file.  I assume the NIOS II Flash Programmer tool has skipped some parts.  Could any one clarify this?  Regards,  Kwok Wong

[Altera_Forum]

TO_BE_DONE