Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12409 Discussions

Qsys Altera PIO and GPIO driver

Altera_Forum
Honored Contributor II
903 Views

I am now getting errors: "gpiochip_find_base: cannot find free range". I was wondering if anyone else has seen this in a project with more than 6 PIO blocks and the altera-gpio module active? I'm running 3.10 LTSI, angstrom.

0 Kudos
0 Replies
Reply