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Valued Contributor III
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Qsys Custom Peripheral Memory Mapping

Hello everyone, 

 

I am a complete newbie with Altera Qsys and Nios as I've only done the basic tutorials. Currently I am trying to use a clock circuit which sends an interrupt signal to a Nios II processor when it reaches a specific value and resets. I am familiar with how to set up memory mapped buses in Qsys for custom peripherals but have no idea of how to setup a peripheral that I'm not writing to or reading from.  

My questions are:  

- What control signal can be used as an enable for a counter in the Qsys custom component creator? 

- Once I have created a custom Qsys component how do I know where each control pin (enable, reset, clock) are when I'm trying to write to the same component in Nios II code? 

 

Ideally I would like to create an enable and disable counter function for the Nios which switch the enable pin on and off on the counter while also resetting the counter every time I want to enable it. 

 

Any help would be greatly appreciated
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Valued Contributor III
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You have to think of your component as memory-mapped, not control signal based. Thus, you need to set up a register map for your custom component where setting a bit (or clearing a bit) performs the action you want, such as enabling a counter.  

 

The easiest strategy for creating a custom component for use in Qsys is to start by creating the basic functionality of your component without worrying (yet) about the Avalon interface. Then create a simple register map for transferring data in (writes) and out (reads) using simple muxes and demuxes to do the address decoding, interfacing the data with your functional design. You'll also add the Avalon signals (address, readdata, writedata, etc.) to interface with the register map you've created. You'll also have one or more control and status registers as mentioned. 

 

See this online training for details: 

 

https://www.altera.com/support/training/course/oqsys3000.html
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Valued Contributor III
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Thank you for your response and that is basically what my professor told me when I got the chance to ask him. I am using a Verilog module which acts as the interface between the Avalon and my counter. This way I can just use a control register which is connected to the Avalon data bus and contains control bits for enable, reset, etc.

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