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Altera_Forum
Honored Contributor I
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Qsys custom component with parameter value from other connected core

I'm creating a custom Qsys component, I can put generics into vhdl top-level file, and than use them as parameters in Qsys. 

How can I pass parameter values from other connected cores? For example "genereic clock : unsigned integer" in my core, how can I pass the value from "Clock Source" component?
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