Have system based on CycV-NiosII with N25Q128 used for general storage of processing data.
This serial flash is not the configuration device.
The board design does not have this set-up as quadspi (next rev will).
So, the bus is set-up as standard spi (clk, csn, mosi and miso).
Am using the Qsys generic quadspi interface feeding a DMA which will read data out of the serial flash to volatile memory.
I have the quadSPI interface on the Nios bus clocked at 20 MHz.
When first bringing up the board and programming the CycV with Quartus (which is all good), the first access I see from the FPGA to this spi bus when CSn goes low is 24 clocks where MOSI is all high. The MISO appears to stay in Hi-Z. I cannot get the FPGA to recognize the device.
A spi command to the serial flash device of 8'hFF does not exist, as far as I have read.
My guess is that this access was to query the device to see what was there from the Nios.
If this is true, I would expect to see a command of 8'h9E on MOSI with the MISO answering.
I am certain the device is connected properly on the board.
I am mostly certain I have the QuadSPI interface set-up properly in Qsys.
Is this a change of the driver for the QuadSPI interface?
How and where would I change the command to be output?
Thanks,
Yev
