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Question concerning Simple Socket Server's SW

Altera_Forum
Honored Contributor II
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Hi,  

 

Background to the question: 

I am using the Terasic's ALTERA DE3 development board (later called main board). This is connected to the  

1 Gbps HSMC NET card through the HCTC A-contact on the main board. Everything is working fine via the  

channel 1 Ethernet interface and software communicates well on 1 Gbps Ethernet through the Ethernet bus.  

 

However in the documentation of the Simple Socket Serves software is said that software has interrupt support  

for the Ethernet circuits (interfaces) on the 1 Gbps HSMC board. I do find the interrupt service routine when  

DMA has transfered datta, named tse_sgdmaRx_isr.  

 

Question: 

But when I go and open the HW RTL-scheme I do not find any interrupt lines coming from the used Ethernet  

circuit (interfaces), through the contact and connected to main board's FPGA and Nios II processor.  

 

How is this solved in software in main card? Is the status of the used Ethernet circuit checked/polled out with  

help of some task or via/in the Timer interrupt or via/in the DMA interrupts routines in some way? Or perhaps  

there are some treads that polls finds out the status of the Ethernet circuit? Of cause there is some rx bit active  

in the Ethernet-circuit that is set but were is this bit checked in sofware finding out that now there are data in  

rx buffer of the used Ethernet circuit and now the DMA channel can be started to transfer data to the descriptoir  

memory?  

 

Very interested in the answer! 

 

Best Rgds!
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