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12421 Discussions

Read DDR to file using HPS2FPGA

Altera_Forum
Honored Contributor II
872 Views

Hi! 

 

I am using the Arrow CV SoCKit, My aim is to sample ADC data (via the HSMC connector and an external adc board) into the FPGA side DDR, then read the results into the HPS using the HPS2FPGA bridge and then store it in a file. 

 

In Qsys I have connected the DDR to the HPS2FPGA AXI Bridge. I am really struggling to get the HPS2FPGA interface up so I can read from it. 

 

Currently I am able to open "/dev/mem" and mmap the LWHPS2FPGA bridge to communicate with my onboard nios (via mailbox) and my other peripherals on the LWHPS2FPGA bus.  

 

I have attempted using the same process (open "/dev/mem" and mmap) for the HPS2FPGA bridge but with base=0xC0000000 and span=0x0001000 however when i use an alt_read_byte with the virtual map this creates the system hangs. 

 

I havent been able to find any resources or examples really explaining the process. 

 

1) is using open and mmap to create a virtual map to use with alt_read and alt_write a valid way of accessing the HPS2FPGA bridge? in which case I am doing something wrong/out of order and can post my code to see what I am doing wrong. 

 

2) if not what should I be aiming to use? are there functions in the altera provided libraries i should be using to initialise the bridge etc?  

 

I am still quite new with the hps side of things so help would be appreciated! 

 

Thanks 

James
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1 Reply
Altera_Forum
Honored Contributor II
170 Views

Hi, 

did you try to go through this example? It may help you to know more about the usage. 

 

1)https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-exam... 

2) https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-exam... 

 

Regards, 

CloseCL 

(This message was posted on behalf of Intel Corporation)
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