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12408 Discussions

Reading FPGA config & Application from EPCS

Altera_Forum
Honored Contributor I
872 Views

Hi, 

 

Bit of a noob here regarding embedded development, so go easy. 

 

I've been developing some firmware for a device using the NIOS II processor and the device is set up to configure and boot from EPCS. I've implemented the ability to backup and overwrite the FPGA and application configuration from within the firmware, which works fine.  

 

A new spin of the board however has introduced a much larger EPCS device (2 MiB) which means I have plenty free for general purpose use, which is good. However, when I do a backup of the firmware I really don't want to have to save the whole device, and nor do I want to accidentally store user data over the FPGA config or application binary. 

 

So my question is this; is there any way I can programatically determine where the application and FPGA configuration end? Or in other words, how can I tell how much space they consume? 

 

On a related note, once I overwrite the FPGA configuration in EPCS, is there any way to force a reconfiguration and reboot from within the application code?
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2 Replies
Altera_Forum
Honored Contributor I
70 Views

 

--- Quote Start ---  

 

So my question is this; is there any way I can programatically determine where the application and FPGA configuration end? Or in other words, how can I tell how much space they consume? 

 

--- Quote End ---  

 

You get this information from the .sof and .elf files you use to program epcs. 

For example you may use this manual procedure: 

1. Convert fpga configuration .sof file into hex 

sof2flash --epcs --input=fpga_project.sof --output=fpga_project.flash 

2. Convert Nios firmware .elf file into hex right after fpga configuration 

elf2flash --epcs --after=fpga_project.flash --input=nios_firmware.elf --output=nios_firmware.flash 

Open the resulting nios_firmware.flash with any text editor, go to the end and read the max used address.  

Remind that epcs is made of 64KB size blocks, so you must place your user data starting from the beginning of the next block and not right after firmware, otherwise you couldn't erase and change it without erasing the last part of firmware data. 

 

 

--- Quote Start ---  

On a related note, once I overwrite the FPGA configuration in EPCS, is there any way to force a reconfiguration and reboot from within the application code? 

--- Quote End ---  

 

You should consider using remote_update core. Refer to AN521.
Altera_Forum
Honored Contributor I
70 Views

I also think enough of the format of the EPCS image is documented to let you read it to find the code to download - and hence the end of it. 

 

If you want to save other info in the latter blocks, I'd pick a fixed offset that gives some free space beyond the current used part - that way you won't get into trouble when the fpga image grows!
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