Reading Interval Timer Core snapshot from an ISRHi all i have a strange problem regarding reading Interval Timer Core snapshot from an ISR. IRQ is triggered by custom UART interface periodically about every 70 ms. I read Interval Timer Core snapshot inside ISR and save it to global variable. In the main program, i check this value and test if specified period of time is elapsed. Timer Core snapshot value read and saved to global variable is incrementing gradually but i also read some strange huge values sporadically. The next value read is usually OK again. When i read Interval Timer Core snapshot outside ISR everything is OK. Has anyone experienced this problem? Best, Primoz
Is the interval timer implemented as a 16bit slave - requiring multiple operations to read the value?If so you will have problems if the isr tries to access the timer at the same time as non-isr code. I've NFI why Altera hasn't implemented 32bit versions of the timers, I'm sure they'd require less logic overall.
Yes it does, it requires multiple operations to read the value. I looked up in documentation:"A master peripheral may request a coherent snapshot of the current internal counter by performing a write operation (write-data ignored) to one of the snap_n registers. When a write occurs, the value of the counter is copied to snap_n registers. The snapshot occurs whether or not the counter is running. Requesting a snapshot does not change the internal counter's operation." It seems that multiple access to timer snapshot results in corrupted data read. I'll tweak my code in order to prevent multiple access to it.
We implememented a simple 32bit avalon slave with 1ms (for timers) and 100MHz (Nios cpu clock) non-resetable up-counters and used those for performance/timing measurements.We also count some async events - remember to sync the event to the Avalon clock, attempts to sync the counter give unexpected values during (ripple) increments.