The follow picture is my current 10m16’s compilation report, my issues are as follows:
Related folder I found on intel net may be not latest, so please afford them to me if you have. If you have related example, may be I will catch and realize the function quickly.
Thanks in advance.
Here the answers for your question:
10m16 mean your MAX 10 device have 16K logic element. Therefore, as long as your design does not exceed 16K logic element, you should be able to design remote system upgrade (RSU).
Noted: MAX 10 device with order code SC and DC do not have dual configuration image feature (unable to design RSU). For more details on MAX 10 ordering code please refer to following link (on page 5): https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_overview.pdf#...
The NCONFIG, CONF_DONE and BOOT_SEL pins must be pulled high (10-kΩ pull-up) in order to make it work. Please refer to following link for more details regarding to MAX 10 Pin Connection Guideline: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/pcg-01018.pdf
If your MAX 10 pin connection are set correctly, you should able to design RSU with your MAX 10 (can run/upgrade new program without repowering FPGA).
If you want to set up NIOS II, you can save it into UFM and run it into internal flash (not RAM). Refer to following link for memory sector utilization for MAX 10 device:
Below are the related links for RSU over NIOS II:
For your addition information, instead of using NIOS II, you also can design RSU and upgrade data over system console with Avalon-MM Master. You can refer to following link for more details on RSU over system console with Avalon-MM Master. However, the reference design below is design for Cyclone 10 (not MAX 10, but the concept to update data over system console is almost similar).