I want to set up a assymetric multiprocessing system on the Cyclon V Soc HPS.One core should execute linux and the other core should execute a baremetal application. Most steps till now are successfull: - limitting linux to lower half of memory and using only one cpu core - starting the 2nd baremetal application via the jtag debugger Now I have the problem, that I want to reset only CPU# 1 from CPU# 0. With the mpumodrst register I can enable CPU# 1. My problem is, that only for the first enabling of CPU# 1 after a hard reset, the program counter of CPU 1 starts at the reset vector address 0x0. When I put back CPU# 1 to reset and reenable it with the mpumodrst register, the CPU# 1 run's from an undefined address, maybe the last executed address. I have the following questions: 1) Is there a way to set the program counter of core# 1 from core# 0, maybe via the debug unit? 2) The mechanism with the cpu1startaddr register in the system manager also doesn't work, because the bootrom is already mapped away by uboot and linux (reset register of L3 interconnect). Mapping back is in principle possible, because under linux the MMU is running and doesn't use physical memory at address 0x0. But somehow mapping back doesn't work. Any ideas, how I can map back boot ROM code to address 0x0? Is this possible at all? 3) Is there any other mechanisme to reset one core properly and initializing it's registers, especially PC and CPSR? I've searched for two days manualy and web but nothing suitable found. Regards, Christian
I see in documetation pictures: MMU unit is separate in both HPS.For "forwarding" 2nd HPS to need address may disable running, fill its all memory with "undefined instruction", reenable it -- and exception runs instantly ! In handler may be any filled code.