The S10 SoC Development board is connected to a host PC via FMC2PCIe Cables.When the board is powered-on, but not programmed it does not show up in lspci on the host. This is different from my experience with Bittware and other boards, where an unprogrammed FPGA shows up as a Bittware device in lspci. After programming, and installing an Altera driver, such as in AN690, the Bittware FPGA shows up as an Altera device. Further, when I program the S10 SoC FPGA, it still continues to not show up in lspci. I suspect my problem is what I have described above: i.e. an unprogrammed S10 SoC board does not show up in lspci, on being powered on. Any insights on how to debug this will be appreciated!
Hi!I think you must use CvP configuration. I use it on my Achille development kit. You must enable CvP mode for your design to compile it. It creates à partial design (with the PCIe interface) that you download on the board prom, and an another file (core.rbf) that you must download after with the PCIe interface (with the appropriate driver of course). So it leads to that following step: At power up, partial design is load before mother board scan the PCIe bus, so the card will be detected. PCie Driver on the mother board download the rest of the design in the fpga Reboot (without switching off S10 SOC of course) must be perform on the host to "refresh" the PCIe scan. Or more simple download all your design (PCIe interface and User design) in the prom without CvP mode. Switch on the system Reboot (once again without cutting off S10 power) host and your PCIe interface must be present. Regards