SPI Communication with STM32 Discovery Board(Master) and Nios(Slave)

[SAN]

First, I'm not good at English. Sorry.

I want to SPI communication with STM32(master)​ and Nios System(slave).

The protocol receives a 3-byte command data and transfers 512-byte data. (slave)

​Slave must transfer 512 Bytes of Data to Master​.

​I use SPI(3 Wire Serial) IP and confirm 1Byte receive&transmit.

But, the slave not received 3-byte. Sometimes it is overwritten and only the last byte is read.

​Rx interrupt handler code is

​===============================================

void SPI_RX_Interrupt_Handler(void * context){

alt_u32 status;

alt_u32 control;

// Disable Interrupt

IOWR_ALTERA_AVALON_SPI_CONTROL(SPI_BASE, 0);

/* Keep clocking until all the data has been processed. */

for ( ; ; )

{

status = IORD_ALTERA_AVALON_SPI_STATUS(SPI_BASE);

if((status & ALTERA_AVALON_SPI_STATUS_ROE_MSK) != 0)

{

IOWR_ALTERA_AVALON_SPI_STATUS(SPI_BASE, 0);

continue;

}

if ((status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) != 0)

{

alt_u32 rxdata = IORD_ALTERA_AVALON_SPI_RXDATA(SPI_BASE);

rxData[rx_counter] = (alt_u8)rxdata;

rx_counter++;

if(rx_counter > 3)

{

rx_complete = 1;

break;

}

}

}

}

​==================================================

qsys capture file is attach.

I use Cyclone IV device and SPI CLK is 3Mbits/s(STM Board setting).​

So, My question is

• Is it right to use SPI(3 Wire Serial) IP?
  • if so, do i need an additional FIFO Buffer or any other IP?
  • if not, please recommand IP.
• ​Can the slave use the SPI Command API(altera_avalon_spi.h)?
  • if so, i will thank you and tell how to use them.

​Thank you for reading.

[JKIM42]

https://forums.intel.com/s/question/0D50P00003yyOaASAU/designing-a-spi-slave