Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

SSS PLUS Superloop extraction

Honored Contributor II

Hey guys, 


i downloaded the sss plus superloop example from altera wiki but im unable to extract the files. I go to the directory and extract tar -xzf FILE the file. After that i try to run the create-this-lib or create-this-app scripts in the console to get the project folders. This doenst work i always get the error unknow command \r and so on and the execution is canceled. 


Any1 has a tipp for me to get this folders or any1 can send me this extracted folders to Viper1109 (at) 


Thanks Rene
0 Kudos
0 Replies