Sampling Multiple Channels with the ADC at The Same Time

[Altera_Forum]

Hello everyone, 

 I am currently trying to sample two differential signals at the same time and I was wondering if there is an easy way to do this in the c code. I can currently sample one channel using the adc code provided in the DE1_SoC_ADC file provided in the CD. However, I cannot find good documentation on how the code works for me to properly adjust the code. I know I can accomplish this task by independently turning on the ADC for one channel, record data, turn off that channel. Then, turn on the other channel and sample. However, I feel as though I will not be sampling at the proper rate if I do this. Any ideas? Thank you in advance.

[Altera_Forum]

To give more information, I am using the Qsys editor with the adc_ltc2308 block. I am guessing that I have to edit the block to take 2 bit inputs as opposed to the default 1 bit option.

[Altera_Forum]

--- Quote Start ---  To give more information, I am using the Qsys editor with the adc_ltc2308 block. I am guessing that I have to edit the block to take 2 bit inputs as opposed to the default 1 bit option.  --- Quote End ---    It is not matter of coding. An ADC has to sample analogue signal and I never heard of a single ADC sampling multiple channels in time sharing way. Use two ADCs then do your processing shared in digital domain.

[Altera_Forum]

--- Quote Start ---  It is not matter of coding. An ADC has to sample analogue signal and I never heard of a single ADC sampling multiple channels in time sharing way. Use two ADCs then do your processing shared in digital domain.  --- Quote End ---    Okay, am I not understanding this paragraph in the manual? http://www.alteraforum.com/forum/attachment.php?attachmentid=11287&stc=1  It says that the ADC can be configured to accept eight input signals.

[Altera_Forum]

it means 8 ADC devices to me (call it channels). 

8 inputs to 8 ADCS (one input per ADC) 8 outputs from 8 ADCs, at this side the speed of each ADC output being 500Ksps Versus serial clock of 40MHz is exploited to que them up as 500Ksps *8 = 4MHz

[Altera_Forum]

--- Quote Start ---  it means 8 ADC devices to me (call it channels). 8 inputs to 8 ADCS (one input per ADC) 8 outputs from 8 ADCs, at this side the speed of each ADC output being 500Ksps Versus serial clock of 40MHz is exploited to que them up as 500Ksps *8 = 4MHz  --- Quote End ---     I did some more research. That statement does not mean that there are 8 ADCS. There are 8 input pins that are connected via a mux which then goes into a single ADC. I am just going to write some code to ping between two channels and see how that works.

[Altera_Forum]

--- Quote Start ---  I did some more research. That statement does not mean that there are 8 ADCS. There are 8 input pins that are connected via a mux which then goes into a single ADC. I am just going to write some code to ping between two channels and see how that works.  --- Quote End ---    ok with such slow ADC it is possible to mux any number of inputs so one adc is time shared between them like a queue. As such what matters to you should be how read the relevant channel in the queue. This info should be available to you from vendor.