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Simple familly and package to run a NIOSII softcore at a non critical design

Altera_Forum
Honored Contributor II
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I´m planning to create a new design composed of a CPU unit added with the usual resources ( timers, program and data memories, etc... ), including some built-in peripheral modules, such as 1 Ethernet, 1 USB, 1 UART and few IOs. I´m aware that probably there are available to sell some ARM-based off the shelf microcontroller IC which meets to these requirements, but I really want to do that with the NIOSII architecture. The project itself consists of a simple home monitoring system accessible by a simple internet protocol, or even via webserver in case of remain enough resources.  

 

However, once the board will initially be assembled by hand during prototyping phase, I wish to select some chip family not BGA based, but sounds like there are no options for families cyclone and stratix: https://cloud.altera.com/ds/migration/?family=cyclone-v 

 

Could someone inform if it is possible to make the above design at a simplest family ?
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Altera_Forum
Honored Contributor II
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Cyclone IV is available with TQFP package but maybe you are faster with a dev-board with all things ready

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Altera_Forum
Honored Contributor II
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flz47655, 

 

 

Thanks for the prompt reply, I´ll take a look on that family. Anyway, I don´t understand why the Cyclone IV is not included at the package selector guide, but just the Cyclone V, as follows: https://cloud.altera.com/ds/migration/?family=cyclone-v.  

 

Is it currently obsolete ?
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Altera_Forum
Honored Contributor II
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Cyclone IV is not obsolete

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Altera_Forum
Honored Contributor II
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Take a close look at the link you provided. It says "family=cyclone-v" That would be why nothing but cyclone V shows up.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Take a close look at the link you provided. It says "family=cyclone-v" That would be why nothing but cyclone V shows up. 

--- Quote End ---  

 

 

The link that I provided above has not a root page, so that a default option is always selected. 

Note that the only families available there at the SelectBox items are: Arria V, Arria 10, Cyclone V, Stratix V and MAX 10. 

 

 

--- Quote Start ---  

Cyclone IV is not obsolete 

--- Quote End ---  

 

 

Ok, but due is not available at the link above, I wrongly presumed it was not recommended for new designs.
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Altera_Forum
Honored Contributor II
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Cyclone IV was recommended for new designs. Please see https://www.altera.com/products/fpga/cyclone-series.html

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Altera_Forum
Honored Contributor II
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hi flz47655, 

 

 

Concerning to selection of the core family, I will do as you suggested and adopt the Cyclone IV, thanks. However, I could not find any P/N option at the following link using some derivative of the TQFP package: cyclone iv device selection guide (http://quartushelp.altera.com/13.1/mergedprojects/device/dev/dev_file_cycloneiv_sel_guide.htm).  

 

 

Am I missing some detail ? 

Thanks in advance.
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Altera_Forum
Honored Contributor II
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Altera_Forum
Honored Contributor II
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Sorry EQFP not TQFP but is similar

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Altera_Forum
Honored Contributor II
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hi flz47655, 

 

 

Thanks again for the support you gave up to now, but I wish to ask one more question: Do you think the part bellow could fit to the requirements for the project specified above, or is somewhat oversized ? 

 

 

 

 

Thanks
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Altera_Forum
Honored Contributor II
434 Views

 

--- Quote Start ---  

I´m planning to create a new design composed of a CPU unit added with the usual resources ( timers, program and data memories, etc... ), including some built-in peripheral modules, such as 1 Ethernet, 1 USB, 1 UART and few IOs. I´m aware that probably there are available to sell some ARM-based off the shelf microcontroller IC which meets to these requirements, but I really want to do that with the NIOSII architecture. 

--- Quote End ---  

 

 

NIOS II take less than 3000 LEs and UART and IOs are not a problem but Ethernet and USB are. 

They require usually external devices to handle these complex interfaces. 

 

For USB 2.0 you can go with FT2232H while for Ethernet you need minimum an external Phy 

 

 

--- Quote Start ---  

Do you think the part bellow could fit to the requirements for the project specified above, or is somewhat oversized ? 

--- Quote End ---  

 

 

It depends on your speed requirements also, why don't go with a DE2 or DE1-SoC board before than building a board on your own?
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Altera_Forum
Honored Contributor II
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My initial dream was to purchase the DE2-115 dev kit from TerasIC, but due to issues related to excessive taxing and long time deliver to my country, the final cost would become quite prohibitive; this is my particular project, not corporate. Concerning to order the individual parts and assemble the board, at first sight could sound like no sence, but I have access to some assembling facilities which encourage to do like this. 

 

By the way, still on the Cyclone IV family based on non-BGA package, do you know another part that could fit to the requirements for this design, or seems like the one above stay with the top features for the QFP derivative ? 

 

Thanks once again.
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Altera_Forum
Honored Contributor II
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Buy from distributors like Digikey, Mouser or Arrow for Academic Price. 

 

If your budget is lower what about a BEMICROMAX10? Only 8k LEs but for learning with no project is fine. 

 

You can add things like Ethernet and USB with GPIO connecting eval boards like UM232H and some other board for ethernet like http://www.emb4fun.de/fpga/nutos1
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Altera_Forum
Honored Contributor II
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I appreciate the suggestion, but the initial purpose was to use the NIOSII architecture. 

 

For some reason, I did not find any option on SOPC Builder to synthesize on MAX10, but just for the MAXII is available, and for this reason I should select a chip which not only complies with the QFP derivative package constraint, but also satisfy the system resources requirements. 

 

I'm noting that I will not find any component that meets the conditions imposed above, and in having to choose one based on BGA, it might be better to base the design on a ready kit, as it was recommended earlier to me.
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Altera_Forum
Honored Contributor II
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You can use NIOSII also with DE1-SOC that have an ARM. You simply don't use ARM and instantiate NIOS in FPGA logic. 

MAX10 require latest version of Quartus (>= 14.0). 

QSys replaced SOPC Builder that is obsolete. 

 

Anyway a ready kit is better.
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