Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12409 Discussions

Simualting NIOS II and modifying boot sequence

Altera_Forum
Honored Contributor II
798 Views

In some parts of my project I need to simulate NIOS II with Modelsim. I follow the documets from ALtera and I am able to run simulation. THE version of Quqrtus is 13.1 SP1 and I am using NIOS II SBT GUI for compiling C codes on NIOS and run Modlesim from the GUI.  

My reset vector and exception vector of CPU are pointing to on chip ram. I can see objdump and hex files are generated and hex file is addressed properly in the RTL. 

in the begining i see cpu is trying to access on chip ram, until it reaches to a function called alt_load and under this function there is alt_load_section subroutine that is used for copying the content of flash to on chip ram! cpu stucks here forever! I don't want this and I don't need any other boot loader.  

Can you please advise me how to get rid of this function?
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
55 Views

This is the OpenCL forum. I think you have posted this in the wrong place.

Altera_Forum
Honored Contributor II
55 Views

Are you sure you haven't enabled the EPCS boot code ?

Altera_Forum
Honored Contributor II
55 Views

I did not enable the simualtion mode of NIOS IDE after doing that I can see activities on the bus!

Reply