Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12419 Discussions

Stratix III DSP Board flash programming issue

Honored Contributor II

Hi all ! 


I have a problem with the flash programming of the stratix III based DSP Board. 


I want to store in the CFI flash memory ( PC48F4400P0VB00 ): 


-The FPGA configuration file, 

-The software project, 

-The .zip file. 


All of these files are related to the web server appllication. 


The purpose is to configure the FPGA and run the software when the board is powered on but I don't succeed in. 


I was searching and reading the flash programmer ug and some other documentation (this forum, Nios wiki,...) but I still don't understand how to make it. 



I know hardware design must be programmed in specified region of the flash but I don't know what it is. Indeed, I don't find an exact information telling me the adress  

where these FPGA files must be programmed as well as the software project and the .zip file. 


I know the reset vector of the NiosII must be located in the flash in order to be able to copy the software in the ram located on the board. 


I have joined the SOPC memory mapping screenshot as well as the screenshot of the CPU configuration. 


To program the flash, I have used the flash programmer included in Nios II IDE. 


Quartus II and NIOS II IDE version : 9.0 sp2. 


If you have questions, please let me know,  


Best regards,  


0 Kudos
0 Replies