System Timestamp Mismatch Error

[Altera_Forum]

I built my NIOS II design in Quartus/SOPC. I check the timestamps had been updated on my .sopcinfo file and .sof file.  

 They had... check... I programmed the .sof file into my FPGA.   I opened Eclipse and checked BSP editor was pointing to the updated .sopcinfo file.   It was ... check.... I built my bsp....   I then built my project and then tried to download it for debugging.   System timestamp mismatch error. What is going wrong?

[Altera_Forum]

How did you check that the timestamp was updated in the .sof file? You can try and delete the .sopcinfo, .sof and all the bsp files and regenerate anything to be sure you start from scratch. 

Which timestamp is the newest? The one read from the FPGA or the one expected by Eclipse?

[Altera_Forum]

Yeah my mistake. I forgot I was using a different .sopc file in that system, as I was opening up an old project. I forgot to check the .qip file in my design which was pointing to the different .sopc. Problem cleared.