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12409 Discussions

There is a problem using the JTAG UART in 19.1

GHelb
Novice
359 Views

The instantiation is wh_nios.jtag_uart:

Info: wh_nios.jtag_uart: JTAG UART IP input clock need (sic) ...

 

The HDL builder looks for wh_nios_jtag_uart and it can't find it:

Error: jtag_uart: Failed to find module wh_nios_jtag_uart

 

0 Kudos
3 Replies
Ahmed_H_Intel1
Employee
224 Views

Hi,

Are you seeing this error while running the application or while compiling it?

it seems like there are some files missing.

 

GHelb
Novice
223 Views

The error happens inside Platform Designer. It is unable to create the system.

 

I checked: A design that works in 18.1.1 does not work in 19.1.

Ahmed_H_Intel1
Employee
223 Views

Ohh, I believe it is a 19.1 issue. I will open an internal ticket to check this and get fixed ASAP. I recommend you to use the 18.1 as it is the most stable version and reliable.

Please accept our apology for this inconvenience.

 

Reply