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Triple-Speed Ethernet with ksz8893

Altera_Forum
Honored Contributor II
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I want to use the mii of ksz8893 connect to Triple-Speed Ethernet ,but it cannot work. 

my socket can listenning, but i cannot ping from pc.please tell me what should i do?
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Altera_Forum
Honored Contributor II
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Put some signaltap probes on the MII interface to see if you are sending/receiving anything. 

Are you sure the MAC/IP addresses are set up correctly?
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Altera_Forum
Honored Contributor II
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I suppose he didn't add phy support to the stack driver list.

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Altera_Forum
Honored Contributor II
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ksz8893 is not a phy, it is a Integrated 3-Port 10/100 Managed Switch with PHYs, and I added the phy profile into tse.Now, my nios is listening,but when i ping from pc to nios, i get nothing. 

this design can work with dc83848 phy. please tell me what should I do? 

thanks!
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Altera_Forum
Honored Contributor II
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when i ping from pc to my nios, i can get signals as txd[3..0] and txdv, but i cannot get signals from my nios.

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Altera_Forum
Honored Contributor II
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Post here the output of nios console when the chip initializes.

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Altera_Forum
Honored Contributor II
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Did you start the Switch? 

When I implemented my KSZ8893, I nearly overlooked that the switch needs a start command to transmit packets. 

 

Does DHCP work?
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Altera_Forum
Honored Contributor II
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ksz8893 tells me below: 

[PS1, PS0] = [0, 0] — I2C master (EEPROM) mode 

(If EEPROM is not detected, the KSZ8893MQL will be 

configured with the default values of its internal registers and 

the values of its strap-in pins.) 

And,In (PS1, PS0) = (0, 0) mode, the chip will start 

automatically after trying to read the external 

EEPROM. If EEPROM does not exist, the chip will 

use pin strapping and default values for all internal 

registers. 

I am a fresh men ,please give me a more detailed explanation about how to use ksz. 

thanks!
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Altera_Forum
Honored Contributor II
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I think that was the only thing I needed to do to get the KSZ started. 

What is reported during initialization? 

Can you ping through from one external port to the other?
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Altera_Forum
Honored Contributor II
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I can ping from pc_A to pc_B, but get nothing when ping pc to my nios. 

Did you control ksz by mill of Triple-Speed Ethernet ? 

please give me some advices. 

thanks
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Altera_Forum
Honored Contributor II
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My time here is 23 clock, I will post the report torrow. 

thanks
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Altera_Forum
Honored Contributor II
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InterNiche Portable TCP/IP, v3.1  

Copyright 1996-2007 by InterNiche Technologies. All rights reserved.  

prep_tse_mac 0 

Could not locate flash sector with MAC address. 

Static IP Address is 192.168.1.30 

prepped 1 interface, initializing... 

[tse_mac_init] 

Marvell 88E1111 

Marvell Quad PHY 88E1145 

National DP83865 

National DP83848C 

KSZ8893MQL 

INFO : TSE MAC 0 found at address 0x00000000 

INFO : PHY KSZ8893MQL found at PHY address 0x01 of MAC Group[0] 

INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

INFO : PHY KSZ8893MQL found at PHY address 0x02 of MAC Group[0] 

ERROR : PHY[0.0] - Mapping of PHY to MAC failed! Make sure the PHY address is  

defined correctly in tse_mac_device[] structure, and number of PHYs connected is 

equivalent to number of channel 

INFO : PHY KSZ8893MQL found at PHY address 0x03 of MAC Group[0] 

ERROR : PHY[0.0] - Mapping of PHY to MAC failed! Make sure the PHY address is  

defined correctly in tse_mac_device[] structure, and number of PHYs connected is 

equivalent to number of channel 

WARNING : MAC Group[0] - Number of PHY connected is not equal to the number of c 

hannel, Number of PHY : 3, Channel : 1 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

INFO : PHY[0.0] - Checking link... 

INFO : PHY[0.0] - Link not yet established, restart auto-negotiation... 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

WARNING : PHY[0.0] - Link could not established 

ERROR : PHY[0.0] - Auto-Negotiation not completed! Gigabit = 0, Duplex = Full 

OK, x=5, CMD_CONFIG=0x01000000 

MAC post-initialization: CMD_CONFIG=0x05000203 

[tse_sgdma_read_init] RX descriptor chain desc (1 depth) created 

IP address of et1 : 192.168.1.30 

Created "Inet main" task (Prio: 2) 

Created "clock tick" task (Prio: 3) 

Simple Socket Server starting up 

[sss_task] Simple Socket Server listening on port 30 

Created "simple socket server" task (Prio: 4)
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Altera_Forum
Honored Contributor II
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I think this log speaks for itself. Check the ERRORS. Something is wrong with Your driver.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Something is wrong with Your driver. 

--- Quote End ---  

 

 

Exactly. 

You seem to have just added the KSZ to the list of recognized PHYs, but not implemented the neccessary read_status functions. The default functions will not work, as you would have to check the link status of the other two PHYs, and mix them into one response. 

 

This is my phy_profile: 

 

void add_phy_to_profile() { /* supported PHY definition */ /* ------------------------------ */ /* KSZ8893M */ /* ------------------------------ */ alt_tse_phy_profile KSZ8893M = {"Micrel KSZ8893M", /* Micrel KSZ8893M */ KSZ8893M_OUI, /* OUI */ KSZ8893M_MODEL, /* Vender Model Number */ KSZ8893M_REV, /* Model Revision Number */ 0, /* Location of Status Register (ignored) */ 0, /* Location of Speed Status (ignored) */ 0, /* Location of Duplex Status (ignored) */ 0, /* Location of Link Status (ignored) */ &KSZ8893M_phy_cfg, /* function pointer to configure Micrel KSZ8893M */ &KSZ8893M_link_status_read /* Function pointer to read from PHY specific status register */ }; /* add supported PHY to profile */ alt_tse_phy_add_profile(&KSZ8893M); }  

 

KSZ8893M_phy_cfg is my Phy init function, where I start the switch. You might not need that. 

KSZ8893M_link_status_read you must implement, so Interniche can detect when it's online. 

 

And as the KSZ contains 3 PHYs, you will need to patch the driver so that when it detects the KSZ, it skips the next 2 PHY adresses. (That's what I did, and it works good.)
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

KSZ8893M_phy_cfg is my Phy init function, where I start the switch. You might not need that. 

KSZ8893M_link_status_read you must implement, so Interniche can detect when it's online. 

 

And as the KSZ contains 3 PHYs, you will need to patch the driver so that when it detects the KSZ, it skips the next 2 PHY adresses. (That's what I did, and it works good.) 

--- Quote End ---  

 

 

mcr42, maybe You would like to add an example code files to nios wiki? It would be a huge help for guys trying to add PHY chips that are not supported by TSE by default. 

 

BR, 

Tomas D.
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Altera_Forum
Honored Contributor II
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I use quartus ii 8.0. 

The below is my codes 

 

--- Quote Start ---  

enum { 

KSZ8893_OUI = 0x225, 

KSZ8893_MODEL = 0x05, 

KSZ8893_REV = 0x00 

}; 

alt_tse_phy_profile KSZ8893 = { 

"KSZ8893", /* ksz8893 */ 

KSZ8893_OUI, /* OUI */ 

KSZ8893_MODEL, /* Vender Model Number */ 

KSZ8893_REV, /* Model Revision Number */ 

0x3F, /* Location of Status Register */ 

2, /* Location of Speed Status */ 

1, /* Location of Duplex Status */ 

0 /* NO MEAN */ 

};  

/* add supported PHY to profile */ 

alt_tse_phy_add_profile(&KSZ8893); 

--- Quote End ---  

 

 

I am not quite understand about "&KSZ8893M_phy_cfg" and "&KSZ8893M_link_status_read", could you teach me how to make them?  

 

And now, I make (ps1,ps0)=I2C slave mode , (SCONF1, SCONF0)=PHY mode MII, and write 0x01 into 0x01.  

What I did just above.  

This my report. 

 

--- Quote Start ---  

InterNiche Portable TCP/IP, v3.1  

Copyright 1996-2007 by InterNiche Technologies. All rights reserved.  

prep_tse_mac 0 

Could not locate flash sector with MAC address. 

Static IP Address is 192.168.1.30 

prepped 1 interface, initializing... 

[tse_mac_init] 

Marvell 88E1111 

Marvell Quad PHY 88E1145 

National DP83865 

National DP83848C 

KSZ8893MQL 

INFO : TSE MAC 0 found at address 0x00000000 

INFO : PHY KSZ8893MQL found at PHY address 0x01 of MAC Group[0] 

INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

INFO : PHY[0.0] - Auto-Negotiation PASSED 

INFO : PHY KSZ8893MQL found at PHY address 0x02 of MAC Group[0] 

ERROR : PHY[0.0] - Mapping of PHY to MAC failed! Make sure the PHY address is  

defined correctly in tse_mac_device[] structure, and number of PHYs connected is 

equivalent to number of channel 

INFO : PHY KSZ8893MQL found at PHY address 0x03 of MAC Group[0] 

ERROR : PHY[0.0] - Mapping of PHY to MAC failed! Make sure the PHY address is  

defined correctly in tse_mac_device[] structure, and number of PHYs connected is 

equivalent to number of channel 

WARNING : MAC Group[0] - Number of PHY connected is not equal to the number of c 

hannel, Number of PHY : 3, Channel : 1 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

INFO : PHY[0.0] - Auto-Negotiation PASSED 

INFO : PHY[0.0] - Checking link... 

INFO : PHY[0.0] - Link established 

INFO : PHY[0.0] - Gigabit = 0, Duplex = Half 

OK, x=1, CMD_CONFIG=0x01000000 

MAC post-initialization: CMD_CONFIG=0x05000603 

[tse_sgdma_read_init] RX descriptor chain desc (1 depth) created 

IP address of et1 : 192.168.1.30 

Created "Inet main" task (Prio: 2) 

Created "clock tick" task (Prio: 3) 

Simple Socket Server starting up 

[sss_task] Simple Socket Server listening on port 30 

Created "simple socket server" task (Prio: 4) 

 

--- Quote End ---  

 

Thank you very much! 

 

 

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Altera_Forum
Honored Contributor II
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hi friend, 

Now, I have changed my profile by 

--- Quote Start ---  

alt_tse_phy_profile KSZ8893 = {"National DP83848C", /* National DP83848C */ 

KSZ8893_OUI, /* OUI */ 

KSZ8893_MODEL, /* Vender Model Number */ 

KSZ8893_REV, /* Model Revision Number */ 

0, /* Location of Status Register (ignored) */ 

0, /* Location of Speed Status (ignored) */ 

0, /* Location of Duplex Status (ignored) */ 

0, /* Location of Link Status (ignored) */ 

0, /* No function pointer configure National DP83848C */ 

&KSZ8893_link_status_read /* Function pointer to read from PHY specific status register */  

}; 

alt_tse_phy_add_profile(&KSZ8893); 

alt_u32 KSZ8893_link_status_read(np_tse_mac *pmac) { 

alt_u32 link_status = 0; 

alt_u32 reg_status = IORD(&pmac->mdio1.reg1f, 0); 

 

/* If speed == 10 Mbps */ 

if(reg_status & 0x4) { 

link_status |= 0x4; 

/* Else speed = 100 Mbps */ 

else { 

link_status |= 0x8; 

 

/* If duplex == Full */ 

if(reg_status & 0x2) { 

link_status |= 0x1; 

 

return link_status; 

--- Quote End ---  

 

 

but I get the report is  

--- Quote Start ---  

[tse_mac_init] 

INFO : TSE MAC 0 found at address 0x0a005000 

WARNING : Unknown PHY found at PHY address 0x03 of MAC Group[0] 

WARNING : Please add PHY information to PHY profile 

INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

INFO : PHY[0.0] - Checking link... 

INFO : PHY[0.0] - Link not yet established, restart auto-negotiation... 

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... 

WARNING : PHY[0.0] - Auto-Negotiation FAILED 

WARNING : PHY[0.0] - Link could not established 

WARNING : PHY[0.0] - Auto-Negotiation not completed! Speed = 100, Duplex = Full 

OK, x=0, CMD_CONFIG=0x01000000 

MAC post-initialization: CMD_CONFIG=0x05000203 

[tse_sgdma_read_init] RX descriptor chain desc (1 depth) created 

mctest init called 

IP address of et1 : 192.168.1.30 

Simple Socket Server starting up 

[sss_task] Simple Socket Server listening on port 30 

Created "simple socket server" task (Prio: 4) 

--- Quote End ---  

 

 

My 3th mac(mii phy mode) can't link. 

 

I have some question. 

1.what is mean "alt_u32 reg_status = IORD(&pmac->mdio1.reg1f, 0); 

"? My 3th mac register at 0x3f, if I change 3f, the IDE cannot complie. 

2.whether I use 3th mac (phy mode) is right? 

3.I am a fresh about ksz8893 hardware, could you teach me how configuration about it . 

 

Thanks very much. Good luck
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Altera_Forum
Honored Contributor II
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I am reading these registers via SPI, I have not tried it via MDIO. 

As the MDIO normally only uses one PHY, I think it is quite tricky to get to the registers of the other two PHYs. 

The MII-interface is not neccessary to check for connection, as you have a fixed link to your FPGA. Depending on your implementation, it will always be 100M (probably) or 10M, and will always be connected. 

So you would only need to check the connection status of the other 2 PHYs, and return when one is connected. 

If you don't care whether a line is connected or not (as is possible for testing), just return any correct value for the link status, e.g.  

/* If speed == 10 Mbps */ // link_status |= 0x8; /* Else speed = 100 Mbps */ link_status |= 0x4; /* If duplex == Full */ link_status |= 0x1; return link_status;
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Altera_Forum
Honored Contributor II
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Ah, I see. 

You can not read Register 1F/3F via MDIO, as these are the internal registers only available through SPI or I2C. 

See the datasheet: 

 

--- Quote Start ---  

The MIIM interface is used to access the MII PHY registers dfined in this section. The SPI, I2C and SMI interface can also be used to access some of these registers. The latter three interfaces use a different mapping mechanism than the MIIM interface. 

--- Quote End ---  

 

 

MDIO reg 1F carries a different status, MDIO reg 3F does not exist. 

 

What you might do, is "hack" the PHY address associated with the MAC, and ask for register 0x1 at (PHY_address +1) and (PHY_address +2). 

I have not tried to understand how that might be done, because implementing SPI on my board was easier.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

mcr42, maybe You would like to add an example code files to nios wiki? It would be a huge help for guys trying to add PHY chips that are not supported by TSE by default. 

--- Quote End ---  

 

 

Do you mean the AlteraWiki? 

I did not find any hook as to where to relate such an article. 

 

But I think I already gave some hints here in the forum, though I'm not certain where and how deep.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Do you mean the AlteraWiki? 

I did not find any hook as to where to relate such an article. 

 

But I think I already gave some hints here in the forum, though I'm not certain where and how deep. 

--- Quote End ---  

 

 

Yes, I mean AlteraWiki :) Working example is far better than any thoughts, because You'll always need some additional info to get the thing done.
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