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Honored Contributor I
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U-Boot v2 aka Barebox

Hello, 

 

I'm inviting you to try this wonderfull bootloader named Barebox (here (http://barebox.org)). I added the nios2 arch to the project some times ago and now, we have some nios2 drivers availables: 

 

- altera uart, 

- jtag uart, 

- altera tse, 

- altera spi, 

 

Of course, others drivers are availables (nor, nand,...). 

 

I made a short tutorial/introduction to the usage of barebox with a neek board on my website: www.elec4fun.fr (http://www.elec4fun.fr

 

Enjoy :)
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Honored Contributor I
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--- Quote Start ---  

Hello, 

 

I'm inviting you to try this wonderfull bootloader named Barebox (here (http://barebox.org)). I added the nios2 arch to the project some times ago and now, we have some nios2 drivers availables: 

 

- altera uart, 

- jtag uart, 

- altera tse, 

- altera spi, 

 

Of course, others drivers are availables (nor, nand,...). 

 

I made a short tutorial/introduction to the usage of barebox with a neek board on my website: www.elec4fun.fr (http://www.elec4fun.fr

 

Enjoy :) 

--- Quote End ---  

 

 

Thanks a lot, I will try this.
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Honored Contributor I
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Hi, 

 

I wake up this old introduction thread because I face some issue using barebox on a brand new Cyclone V DK dev board. 

I using Quartus 12.1 Web edition tools on a Centos 6.3 32bit linux workstation. 

 

I manage to compile barebox (version 2013.02) for this dev board, and download it on the board. 

Nios2 design include altera_tse IP, JTAG UART (and UART) and other IP (DDR3 ...). 

 

I can download barebox elf on the board, and start it 

It works ! I can see the prompt, and execute some commands. 

 

But few things are not working as expected. 

The most annoying is network. DevKit is connected to a Gigabit network with a working DHCP server. With default factory, board is working correctly, i.e. board update portal receive IP and is reachable over network. 

 

I enable altera_tse in barebox driver (via make menuconfig). 

At barebox prompt, command dhcp show a serie of Timeout. On the board, 1Gb LED is on, by I don't see any activity on RX and TX LED. 

If I set a static IP, ping command is also on timeout. 

 

First investigation shows something wrong on PHY init (or at least, no PHY init). Maybe this part is missing. 

 

On another hand, I try lwip library (thanks to BillA), and the basic example is working on the same design (i.e., DHCP, and basic http server running). 

 

Any suggestion would be greatly appreciate. 

 

Regards, 

Christophe
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Honored Contributor I
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Hi, 

 

I'm glad to hear you are giving barebox a try ! 

 

I took a look at the schematics of your board and it seems the PHY is at address 0. 

Did you change the PHY address while declaring the device in your board file ? 

 

Reading the driver code makes me think we should do something when the PHY is not 

detected (either auto-detect or at least print something). 

 

Franck.
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Honored Contributor I
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Hi, 

 

Thanks Franck for your response (and for your work on Barebox / Nios 2). 

 

I already change PHY address to 0 (or -1), else, I got an error about unknown PHY id. 

 

We have made some progress. 

 

According to the design, we have to use dedicated memory descriptor. So, I complete in generic.c (well, a copy for this file for the DK board) the description, (tse_mac) with a new entry. 

Now, I can see TX LED activity, but, unfortunatly, server don't seems to proceed the Frame (maybe the frame is wrong, and dropped). 

 

I enable trace in barebox altera_tse driver. I see several sgdma TX. 

First one has status 0xC, and following have 0x1C, until timeout. 

I'll try to dump packet, and check if it's correct. 

 

Edit : In MAC Registers about status, aAlignmentErrors increase (when server perform a broadcast ping). Packet dump shows something similare. To be Continue. 

 

Regards, 

Christophe
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Honored Contributor I
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Hi, 

 

Have you made some progress so far ? 

 

Franck.
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Honored Contributor I
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Hi, 

 

I solve this issue. 

As describe in my first, PHY Init is required now (or default register is not correct). I look inside TSE driver, and found some registers to set. I complete barebox TSE driver, and now, it's Ok. 

I also change uncache address base, since the default value don't match our design (or change with Cyclone V). 

 

Regards, 

Christophe
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Honored Contributor I
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Hi, 

 

Ok, great to hear. 

 

Thanks for the update. 

 

Franck.
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Honored Contributor I
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Hi, 

 

I wake-up agin this thread :) 

 

Our design change, and now include a mmu support (instead mpu). 

I update barebox config, add MMU support, but keep all previous settings. 

 

Unfortnatly, barebox don't start anymore ( no console print, even with log level and early printf). 

 

Other baremetal applications (MemTest...) from altera keep working, and linux manage to boot. 

 

I try to trace it with gdb (via jtag cable). It keeps looping on arch/nios2/cpu/start.S, between "EXCEPTION TRAMPOLINE" and "initd 0(R6)" 

 

/* EXCEPTION TRAMPOLINE -- the following gets copied * to the exception address (below), but is otherwise at the * default exception vector offset (0x0020). */ _except_start: movhi et, %hi(_exception) ori et, et, %lo(_exception) jmp et _except_end: /* INTERRUPTS -- for now, all interrupts masked and globally * disabled. */ wrctl ienable, r0 /* All disabled */ /* DCACHE INIT -- if dcache not implemented, initd behaves as * nop. */ movhi r4, %hi(DCACHE_LINE_SIZE) ori r4, r4, %lo(DCACHE_LINE_SIZE) movhi r5, %hi(DCACHE_SIZE) ori r5, r5, %lo(DCACHE_SIZE) mov r6, r0 1: initd 0(r6) <-- When reach here, jump to _except_start add r6, r6, r4 bltu r6, r5, 1b 

 

Any idea or suggestions ? 

 

Regards, 

Christophe
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Honored Contributor I
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Hi, 

 

Look here: http://www.elec4fun.fr/2011-03-30-10-16-30/2011-03-31-13-08-45/startwithbarebox 

 

Update: sopc-create-header-files as a bug on newer quartus versions (http://www.alteraforum.com/forum/archive/index.php/t-34232.html). Please check your nios_sopc.h file. 

 

Franck.
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Honored Contributor I
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Hi Franck, 

 

Indeed, the second link is the issue identify. I just realize it by checking# define in nios_sopc.h. 

 

I see lastest barebox introduce device_tree support. I don't know if I can use it right now. 

 

Also, thanks for your website (elec4fun.fr), I use it as reference :cool: 

 

Regards, 

Christophe
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Honored Contributor I
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Indeed, we now have dt support in Barebox. 

 

We should add the device tree support to the nios arch. I'll do that when I have time (or you ? :)). 

 

Franck.
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Honored Contributor I
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Nice suggestion, but as you guess, I'm new in embedded developpement, and I just discover devicetree feature. 

 

Also, I can send you my minor update of altera_tse driver. I don't know (I mean, howto) push it back to barebox project. 

 

Regards, 

Christophe
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Honored Contributor I
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I'd be happy to merge your changes. 

 

Check your PM. 

 

Franck.
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Honored Contributor I
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Hi Franck, 

 

Email send. Thanks. 

 

On another side, I face a new trouble. 

After fixing nios_sopc.h, barebox start, and I reach the prompt. 

 

But shortly after, without notice, an exception is raised. 

barebox@generic:/ iomem 0x00000000 - 0xffffffff (size 0x00000000) iomem 0xc4000000 - 0xc41fffff (size 0x00200000) ssram0 0xc5200000 - 0xc527ffff (size 0x00080000) onchip0 0xc8000000 - 0xcfffffff (size 0x08000000) ram0 0xcff30000 - 0xcff3ffff (size 0x00010000) stack 0xcff40000 - 0xcff9ffff (size 0x00060000) malloc space 0xcffa0000 - 0xcffeb7cb (size 0x0004b7cc) barebox 0xcffeb7cc - 0xcffedd6b (size 0x000025a0) barebox data 0xcffedd6c - 0xcfff3227 (size 0x000054bc) bss 0xe0000000 - 0xe3ffffff (size 0x04000000) cfi_flash0 0xe5000000 - 0xe5001fff (size 0x00002000) altera_tse0 0xe5003000 - 0xe50033ff (size 0x00000400) altera_tse0 0xe5003400 - 0xe500343f (size 0x00000040) altera_tse0 0xe5003440 - 0xe500347f (size 0x00000040) altera_tse0 0xe6000080 - 0xe600009f (size 0x00000020) altera_serial_jtag0 0xe60000a0 - 0xe60000bf (size 0x00000020) altera_serial0 0xe60000c0 - 0xe60000df (size 0x00000020) altera_serial1 barebox@generic:/ *** ERROR: unimplemented instruction @ c350fb40 # ## ERROR# ## Please RESET the board# ## 

 

First, this never happen with our previous MPU design. 

Second, It don't seems to occur when I "place" barebox at bottom of DDR3 (above 0xc8000000). 

Third, instruction @ XXXX is random. 

 

I give a look at nios2/lib/clock.c, and everything seems Ok. But I notice important side effect when I try some minor change on this file. 

 

Linux kernel still running nicely. 

 

Regards, 

Christophe
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Honored Contributor I
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Hi, 

 

You should try to remove the more driver you can to check if one of them can cause this problem. 

 

Franck.
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Honored Contributor I
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Hi, 

 

After investigation, I found that exception raise come from __muldi3 and other operand operation. (_mult is used by cyc2ns()). 

 

Maybe it's not only barebox related issue, but when barebox is on top on ddr3 space (our range ddr3 is 0x800 0000 to 0xfff ffff), this exception occurs randomly (but at least 10s after starting). 

Another strange fact is, clock_source function are based on uint64_t, and exception seems to come form __multdi3, which is long long typed ! 

 

In fact, this exception doesn't occur with the same Nios2 design without MMU and Linux (with MMU). 

 

Regards, 

Christophe 

 

FPGA : Cyclone V Altera DevKit 

Tools : Quartus 12.1 WebEdition
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