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Hello.
I seek to use the macros like IORD_ALTERA_AVALON_UART_STATUS(base). My code is : void uart1_init(void) { int data_uart ; ... alt_irq_register(UART1_IRQ, NULL, isr_uart1) ; // read status register from UART1 data_uart = IORD_ALTERA_AVALON_UART_STATUS(UART1_BASE) ; ... } The file systems.h is for UART1 : /* * uart1 configuration * */ # define UART1_NAME "/dev/uart1"# define UART1_TYPE "altera_avalon_uart"# define UART1_BASE 0x0011D0A0 <--- base of registers : 0x0011d0a0# define UART1_IRQ 4# define UART1_BAUD 19200# define UART1_DATA_BITS 8# define UART1_FIXED_BAUD 1# define UART1_PARITY 'N'# define UART1_STOP_BITS 1# define UART1_USE_CTS_RTS 0# define UART1_USE_EOP_REGISTER 0# define UART1_SIM_TRUE_BAUD 0# define UART1_SIM_CHAR_STREAM ""# define UART1_FREQ 50000000 In assembler, I find : 0x0000686c <uart1_init+80>: call 0x11320 <alt_irq_register> 0x00006870 <uart1_init+84>: movhi r2,18 0x00006874 <uart1_init+88>: addi r2,r2,-12120 0x00006878 <uart1_init+92>: ldwio r2,0(r2) <-- here r2 = 0x0011d0a8 Is this an error of compilation ? Is this an error of my share in the accesses to the registers of the UART? Thank you for your assistance. Best regards. BBOLink Copied
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This looks correct to me.
The UART registers are native bus aligned, so are at offsets which are multiples of the data width (0, 4, 8, etc). The STATUS register is register number 2, so should be at offset 8, which is the location the assembler code is reading from.
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