I want different applications running on multiple instances of a single Nios design. How do I specify unique memory initialization files?(I rather not have two Nios designs and two BSPs, different in name only.) // for example: nios_cpu cpu0 (...); // this one should use cpu0_mem_init.hex nios_cpu cpu1 (...); // this one should use cpu1_mem_init.hex Thanks!
I think if you want running multiple different applications "in parallel", you should instantiate multiple NIOS cpus in Qsys (i.e. nios_cpu1, nios_cpu2, etc.).Otherwise how do you imagine running multiple applications on the same cpu simultaneously (if I properly understood what you mean) ?
I want to use multiple instances of the same Nios design, not just one instance. That is, re-use the same Nios design with each instance running a different application.
So, you don't need to run different applications simultaneously ? Correct ?If it's the case why you instantiate multiple NIOS (I mean in your Verilog/VHDL wrapping module) ? You can instantiate single NIOS and run different application on it ... or I missed something.
Your last summary of my intent is correct. I would like to run different applications on two (or more) Nios processors where each processor is an instance of the same Nios design. This way I have only one Qsys project and one BSP.How do I assign a unique memory initialization file (containing the application ) to each Nios instance? // Verilog example. One Nios design ("nios_cpu") instantiated twice, with each instance running a unique application (how do I assign the .hex file to each?): nios_cpu cpu0 (...); // this one should use cpu0_mem_init.hex (how do I assign this?) nios_cpu cpu1 (...); // this one should use cpu1_mem_init.hex (how do I assign this?) Thanks.
There is something in your considerations that I can't understood: why do you need multiple instances of nios in your qsys in order to run multiple different applications not simultaneously.With only one qsys module (that contains only one instance of nios), instantiated in you wrapping top Verilog module you create only one BSP. And with such setup you can run multiple applications flashing them consequently.
Yes, your point is a good one and that has been considered. However, the two different applications are very time critical so I want to take advantage of parallelism.