Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12409 Discussions

Uploading software on the HPS without a DS-5 license

Altera_Forum
Honored Contributor II
1,082 Views

Hello everyone, 

 

We have a few products with the Cyclone V Soc FPGA and to develop software on it we use the Soc EDS with a DS-5 license. But now I'm looking into ways to make an automated test system, both for us and for our board manufacturer. 

For our previous generation, that used Nios 2 CPUs, we made some test applications using System Console and we were quite happy with it. AFAIK on the Soc platform I could still use system console if I add a JTAG Avalon master, but I can't access the HPS side. I'd at least need first to run a preloader (for SDRAM calibration) and open the FPGA to HPS bridge. So as I'd need to upload some software anyway I was thinking about writing an embedded test software that would to a full test, and a PC application that would just show the result to the user instead of using System Console. 

Now with a DS-5 license, there seems to be some command line tools that I could use to automate the process. But I'd rather not buy another full license just to do that. I don't need the debugger or anything else, just an HPS equivalent of nios2-download. 

 

I had a try with OpenOCD, but it's not that easy to use and configure on Windows. First to use it with a USB Blaster (1, we don't have any USB Blaster 2 here) I need to uninstall the USB blaster driver, and install the WinUSB driver instead. That means I can't use the USB blaster to configure the FPGA any more. And the download speed is painfully slow, topping at a few hundred bytes per seconds. I tried changing the frequency in the cfg file, with no effect. Did I miss something obvious? 

 

Is there another OpenOCD driver that could talk to the Altera JTAG server instead of using directly USB? Is the situation different with the USB Blaster 2, or with Linux? (although I'm not sure our board producer would be able to use and maintain a Linux desktop). Are there other alternatives? 

 

I'd appreciate any input or experiences from other users. The other alternative I'm thinking about now is to flash the preloader and RedBoot before starting the test and use RedBoot to upload the embedded test software. 

 

Thank you!
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
159 Views

I was looking for the same a couple years ago 

 

https://www.alteraforum.com/forum/showthread.php?t=51040&p=210602&highlight=#post210602 

 

Don't think I found a way of doing so. Nobody replied to the thread either. 

 

Think I ended up writing some bootstrap I load into the flash using jtag indirectly and then using tftp to load the test software. 

 

It's a bit sad that something like this hasn't been made available as it's quite useful in fully automated regressions or during production testing. It's possible with nios and easy with Xilinx/Zynq (see my url above)
Altera_Forum
Honored Contributor II
159 Views

Okay thank you. I did a research on the forum before posting but somehow I didn't find your thread.

Altera_Forum
Honored Contributor II
159 Views

I've talked to an FAE and he didn't have any other solution than paying for an extra DS-5 license or use the flash either.

Reply