I put some slow speed component to a subsystem inculde EPCS controller,and the reset vector point to EPCS.when i genertate bsp there is an error:SEVERE: .entry section mapping not created because reset memory region not located at base address: 0xffffffffffffffff when auto generation,there is no reset region in Linker Memory Regions, no entry section in Linker Section Mappings generated,so i create it menually,but the error is still there.
I had this error with output like:
SEVERE: .entry section mapping not created because reset memory region not located at base address 0xffffffffffffffff.
then I checked:
Had the same problem, sovled it by : - in QSYS->System Contents , right click your Nios cpu -> Edit... - in the tab "Core NiosII", check if "reset vector memory" points to a memory module and not e.g. jtag etc. - same with "exception vector memory" - after correction : QSYS->Generation->Generate
And finally, I've set the proper Reset Vector Memory (on my RAM.s1 connected to NIOSII) and Exception Vector the same way. I had no "Core NiosII" tab in 18.1 version.