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Using FPGA to HPS-Bridge

Altera_Forum
Honored Contributor II
1,063 Views

I am trying to read Data from the FPGA via the FPGA2HPS-Bridge. When trying to read, the HPS freezes. Is there some kind of tutorial or example for an C-Progam that reads the data out of the Bridge/RAM? Or what would be the easiest way to implement such a function? It needs to be able to read from the bridge and send those values via UDP, about 70.000 per second. 

 

Here is the code i currenty use:
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2 Replies
Altera_Forum
Honored Contributor II
162 Views

I am not sure why but everytime I click to download your bridge test code, the forum asked me to log in (I am already logged in) but once I did that I am still unable to view your file. Weird. 

 

Anyway, I am assuming that you are using Cyclone V SoC devices. I don't have a C-program tutorial, but there is a working design for Cyclone V and Arria 10 SoC that you can refer on (based on baremetal). Here is the link: 

https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-exam... 

 

Hope it helps....
Altera_Forum
Honored Contributor II
162 Views

That is exactly what i was looking for, Thanks a lot, sunshine!

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