Using Sopc2DTS utliity to process .sopcinfo file with multiple UART's

[Altera_Forum]

All, 

 I recently ran into an issue when using the Sopc2DTS utility to generate a .dts file from an .sopcinfo file that contained two Nios processors (referenced in the .sopcinfo file as nios2_qsys_0 and cpu_w_MMU) as well as three (3) UARTS and some additional components [e.g. FIFOs, etc.]). The Altera JTAG UART (jtag_uart_0) is connected to nios2_qsys_0 while the Altera JTAG UART (jtag_uart) and the altera serial uart (uart) are both connected to cpu_w_mmu. the cpu_w_mmu nios ii boots u-boot and linux with the console port configured to set to run out of the altera serial uart (uart) component (ttyAL0). [/I][/I][/I][/I][/I][/I][/I][/I][/I][/I] When I use the Sopc2DTS utility to generate the .dts file with the Point of View (POV) set to cpu_w_MMU, the Altera jtag_uart component is generated below the altera uart component in the .dts file. I normally didn't think this would be a problem but when I generate the .dtb file from the generated .dts file and burn it into flash, the U-boot messages are generated out the ttyal0 serial uart until the booting process it handed off to the kernel which then switches the console output to the jtag_uart component. However, if I manually move the uart component to be above the jtag_uart component in the .dts file, the console output works as desired and is always generated out the Altera serial UART (uart) component.[/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I]  i wouldn't think the order of the generated uart components in the .dts file would be important but based on my testing it does seem to make a difference. in order to prevent manually moving the uart components around in the .dts file, should there be an option in the sopc2dts utility to have user be able to specify the priority order of the uart components? or is there another way to specify the order of how the uart components are generated?  [/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I] as it turns out, i could have sorted my components based on address which would have put the components in the right order but that just happens to be true for my particular .sopcinfo file. if the uart component address happened to be assigned to something higher than the jtag_uart component, the console output still wouldn't have worked as expected.[/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I]  i have attached a copy of the .sopcinfo file i have used for processing as well as the unmodified generated .dts file that shows the uart component below the jtag_uart component.[/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I]  Please let me know if you any questions. Any feedback would be appreciated.[/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I]  - Brad S.[/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I][/I]

[Altera_Forum]

Hello Brad, 

 Although I am sharing my thoughts here, I afraid it may not be useful.  

• I looked at your DTS file. I noticed that Sopc2DTS utility have neither arranged components in Alphabetical order nor arranged them according to Address order. This leads me to think that Sopc2DTS utility might be arranging components in the same order in which they are arranged in Qsys. Could you check whether my assumption is right or not? If this is, you can simply move your UART component above JTAG_UART in Qsys system without changing any of their configurations. I agree that this is not proper approach to tackle this issue. But this is just attempt to see whether it makes any difference. 
• To download Linux Image, we are using (syntax may not be exactly correct) nios2-download -c <jtag cable name> <file-name> . Once it is downloaded, we are using nios2-terminal -c <jtag cable name>. Using this way, it uses JTAG UART for both downloading Linux Image and for Console output. I noticed in nios2-terminal help, that instead of -c we can use -port command to use UART instead of JTAG_UART for console output. In your case, how do you route console output to UART instead of JTAG_UART. It looks you are not using commands which I have mentioned here. Otherwise, you could have solved this issue.  
•  

  Thanks, Bhaumik

[Altera_Forum]

Hi Bhaumik, 

 Thank you for your reply.  You are correct that the .dts file I attached was generated by the SOPC2DTS default settings and I did not specify sorting on any parameters. Unfortunately, I'm currently unable to confirm that the order that the components listed in the .dts file are in the same order that was arranged and generated by Qsys.  I also did not download the image to the Nios II processor using the JTAG cable. I have been updating the on-board flash and then the image is being booted by U-boot and copied to the RAM before execution. To set the console port to use the Altera UART instead of the Altera JTAG UART by adding support for the Altera UART by updating my kernel configuration by going to the Device Drivers -> Character Devices -> Serial Devices under the menuconfig.   I also made the following modification for the U-boot configuration:  It appears that the u-boot configuration support file found @ /u-boot-socfpga/include/configs needs to be updated so that at a minimum:  1. Comment out# define CONFIG_ALTERA_JTAG_UART so it's undefined and enable the# define CONFIG_ALTERA_UART definition. 2.#define CONFIG_SYS_NIOS_FIXEDBAUD needs to be undefined so I can set the baud rate based on the CONFIG_SYS_UART_BAUD parameter. 3.#define CONFIG_SYS_CONSOLE_INFO_QUIET is also undefined so that the console output is active.  Once I made these modifications, the U-boot and Kernel console messages appeared on the serial UART instead of the JTAG UART.  - Brad

[Altera_Forum]

Hello Brad, 

 Thank you for sharing with us how you are making it possible to route Console outputs to Serial UART instead of JTAG UART. I am sorry I do not have anything more to share with you in this.   Anyway, Best of luck.  Thanks, Bhaumik