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What can I do for 'Main Optimizer failed' error in Intel HLS?

Honored Contributor II



My component has two stream in inputs and one stream out output.  

The two inputs pass through the Shift register and perform multiply operations between the elements.  

x86 execution is not a problem. An error such as the following occurs when executing build.bat test-fpga.  


"Instruction does not dominate all users!" 


One stream in is a blocking read, and the other stream in is a non-blocking read.  

Changing both data to non-blocking causes the same error.  


Shift register has no errors, and errors occur when multiplying the elements.  

The data type is ac_fixed, and is an operation of 8bit and 1bit.  


I uses Quartus 17.1 version. What can I do?
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2 Replies
Honored Contributor II



Can you share the command prompt log, .cpp & .bat files? 


Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Honored Contributor II

Dear Mr. Anand 


I am sorry. I can't share any files because of our company policy. 


But I add pseudo code. build.bat is changed only cpp filename and -ghdl option for test-fpga.  


# include <> 



typedef ac_fixed<8,8,false> fixed8; 

typedef ac_fixed<1,1,false> fixed1; 

typedef ac_fixed<10,10,false> fixed10; 


component void func(stream_in<fixed8> a, stream_in<fixed1> b, stream_out<fixed10> c) { 

hls_init_on_reset static fixed8 d[xx]; 

hls_init_on_reset static fixed1 e[xx]; 


for (){ 

// Non blocking read1  

bool success = false; 

fixed8 data = a.tryRead(success); 

if (success) { 

//Shift register 

# pragma unroll 

for ... 

d[] = data;  


// Non blocking read2 

bool success1 = false; 

fixed8 data1 = b.tryRead(success1); 

if (success1) { 

//Shift register 

# pragma unroll 

for ... 

e[] = data1;  


//--------------- The following makes error ---------------- 

fixed10 m = d[] *e[]; 






int main() { 

//Generate stream in data and buffer 


// Invoke component 


return 0; 


That's all. What can I do?