Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12452 Discussions

Why does .bss section load to UFM flash memory in MAX10 QSYS project?

OGavr
Beginner
1,252 Views

I use Quartus 16.1 and MAX10 device 10M16DAF256I7G. I create project with NIOS QSYS. I place NIOS code in UFM memory, and RAM in onchip RAM. I create BSP automatic and not change it. I know, that .rwdata section is relocable and loaded in flash. But I see, that .bss section is placed in flash too. It write in UFM 4 kB zeroes. Why does it do it?

This is objdump output:

 

proj.elf:    file format elf32-littlenios2

proj.elf

architecture: nios2:r1, flags 0x00000112:

EXEC_P, HAS_SYMS, D_PAGED

start address 0x00008180

 

Program Header:

   LOAD off   0x00001000 vaddr 0x00008000 paddr 0x00008000 align 2**12

        filesz 0x00000020 memsz 0x00000020 flags r-x

   LOAD off   0x00001020 vaddr 0x00008020 paddr 0x00008020 align 2**12

        filesz 0x000029fc memsz 0x000029fc flags r-x

   LOAD off   0x00004000 vaddr 0x00010000 paddr 0x0000aa1c align 2**12

        filesz 0x00000124 memsz 0x0000131c flags rw-

 

Sections:

Idx Name         Size     VMA      LMA      File off Algn

 0 .entry       00000020 00008000 00008000 00001000 2**5

                 CONTENTS, ALLOC, LOAD, READONLY, CODE

 1 .exceptions  00000160 00008020 00008020 00001020 2**2

                 CONTENTS, ALLOC, LOAD, READONLY, CODE

 2 .text        00002808 00008180 00008180 00001180 2**2

                 CONTENTS, ALLOC, LOAD, READONLY, CODE

 3 .rodata      00000094 0000a988 0000a988 00003988 2**2

                 CONTENTS, ALLOC, LOAD, READONLY, DATA

 4 .rwdata      00000124 00010000 0000aa1c 00004000 2**2

                 CONTENTS, ALLOC, LOAD, DATA, SMALL_DATA

 5 .bss         000011f8 00010124 0000ab40 00004124 2**2

                 ALLOC, SMALL_DATA

 6 .onchip_flash_0_data 00000000 0000ab40 0000ab40 00004124 2**0

                 CONTENTS

 7 .onchip_memory2_0 00000000 0001131c 0001131c 00004124 2**0

                 CONTENTS

 8 .comment     00000023 00000000 00000000 00004124 2**0

                 CONTENTS, READONLY

 

.bss is UFM address.

 

I not change linker.x script. At this scrip I find:

.bss : { __bss_start = ABSOLUTE(.); PROVIDE (__sbss_start = ABSOLUTE(.)); PROVIDE (___sbss_start = ABSOLUTE(.));   *(.dynsbss) *(.sbss .sbss.* .gnu.linkonce.sb.*) *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) *(.scommon)   PROVIDE (__sbss_end = ABSOLUTE(.)); PROVIDE (___sbss_end = ABSOLUTE(.));   *(.dynbss) *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)   . = ALIGN(4); __bss_end = ABSOLUTE(.); } > onchip_memory2_0

 I try add NOLOAD option to .bss with no effect.

 

0 Kudos
1 Reply
GuaBin_N_Intel
Employee
244 Views

Each of section can be put to different memory regions by user through linker's memory map.  ​Refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2sw_nii5v2gen2.pd..., 7.15.2.1 and figure 12

.text—All remaining code

.rodata—The read-only data

.rwdata—Read-write data

.bss—Zero-initialized data

Reply