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Altera_Forum
Honored Contributor I
1,679 Views

Why qsys reports address overlap error?

I am working on a qsys subsystem, I try to increase the onchip_ram size. But After I configured the ip and modify the address, the qsys giving me errors (see attached screenshot). It is obvious that the cpu jtag debug module address doesn't overlap with the ram address. Why it still gives me error?

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6 Replies
Altera_Forum
Honored Contributor I
130 Views

Anyone can help?

Altera_Forum
Honored Contributor I
130 Views

The memory block size looks strange, it should be a nice round number. 

You should also move things so that the address map 'works' if the size of everything is rounded up to a power of 2.
Altera_Forum
Honored Contributor I
130 Views

SOPC builder has assign base adresses, have you done the similar operation in Qsys?

Altera_Forum
Honored Contributor I
130 Views

 

--- Quote Start ---  

The memory block size looks strange, it should be a nice round number. 

You should also move things so that the address map 'works' if the size of everything is rounded up to a power of 2. 

--- Quote End ---  

 

 

The ram size is 20K. 4eab in hex = 20139 in dec. So you mean I should change it to 4fff? 

 

Thanks.
Altera_Forum
Honored Contributor I
130 Views

 

--- Quote Start ---  

SOPC builder has assign base adresses, have you done the similar operation in Qsys? 

--- Quote End ---  

 

 

The base address is assigned by Qsys, but I can change it.
Altera_Forum
Honored Contributor I
130 Views

A size of 20*1024 would be more reasonable - probably what you get anyway. 

But move the jtag up to a 64k boundary
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