I'm attempting to boot my project from QSPI on the Arrow SoCKit development board (Cyclone V), but the preloader is not loaded correctly into on-chip ram by the boot rom.The preloader is build using the standard tool provided by SoCEDS 14.0. The options "boot from QSPI" and QSPI_NEXT_BOOT_IMAGE 0x60000 were used, and the image including the boot rom header is created with 'mkpimage -o preloader-mkpimage.bin u-boot-spl.bin' The preloader is written to QSPI from U-BOOT and placed at address 0x00000. The BOOT_SEL pins are configured to '111' meaning 3V QSPI boot The CLK_SEL pins are configures to '00' meaning lowest possible CLK. As stated initially the preloader is not loaded correctly into ram during boot. The image that is written to QSPI is as follows: 0xEA00001A 0xE59FF014 0xE59FF014 0xE59FF014 0xE59FF014 0xE59FF014 0xE59FF014 0xE59FF014 0xFFFF0020 . . . However the data that gets loaded into ram at 0xFFFF0000 is shifted by one byte. By breaking execution of the bootrom I can see the ram containing the following 0x00001AFF 0x9FF014EA 0x9FF014E5 0x9FF014E5 0x9FF014E5 0x9FF014E5 0x9FF014E5 0x9FF014E5 0xFF0020E5 . . . The boot rom therefore doesn't find the image valid, and the preloader is not executed. I've tried the various settings for the CLK_SEL pins but without any luck. Does anybody have a suggestion? br, Jesper
You work on recipe from http://www.rocketboards.org/foswiki/documentation/bootthearrowsockitfromqspi ?The "change the BOOTSEL jumpers to '111' " may be incorrect. For my Altera kit on http://www.rocketboards.org/foswiki/documentation/gsrd131qspiboot writed: --- Quote Start --- 1. Configure board to boot from QSPI: Jumper Setting J28 right shorted J29 left shorted J30 left shorted --- Quote End --- This value is 3 or 4 (don't know direction of '1'), not 7 from '111' ! You was run QSPI-test from http://www.altera.com/support/examples/soc/soc.html on our kit ? OK ? Which instrument you use for debugging BootROM execution ?
I followed the Arrow SoCKit recipies on rocketboards.org. I still don't know what went wrong, but without any apparent change in the procedure I'm now able to boot from QSPI.Regarding debugging of the BootROM I simply used DS-5 and the USB blaster JTAG interface in the SoCKit dev board. To connect to the target during "cold start" I did the following: 1) press and hold down both the HPS_RST and the WARM_RST buttons. ( they are connected to HPS_NPOR and HPS_RST respectively) 2) release only the HPS_RST button 3) connect to the target via the DS-5 debugger. Use a "debug configuration" that only connects to the target. 4) issue the debugger command "interrupt" 5) release the WARM_RST button This catches the target at address 0x0, and from there you can single step through the BootROM. Jesper
BIG ThankS for good technique ! It's work ! Where may read about many these tricks ?You already solve the Arrow-QSPI problem ? In Disassembler you may find a differences in reading from QSPI in BootROM and in Altera QSPI test ? This may be bug in BootROM code or in Arrow schematic of board -- in byte FIFO 1 lost or spare value...
Glad it was of help.I don't have a particular place where you can read about these tricks - I guess this one was just due to experience in working with embedded systems. I am able to run the preloader from QSPI, but I haven't found an explanation for why it went wrong in the first place. Jesper
I am struck in trying to boot from qspi nor flash connected to HPS of cyclone VSOC. My code works fine in debug mode. But when i make it to boot automatically from qspi flash, the system doesnt boot on its own. my jumper settings are correct and flash is also compatible with intel ICs.
The aim is to boot the system using qspi flash without using u boot or linux. I want my application to boot. The procedure is as follows.
System is not booting from qspi flash. No information in uart also.