Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

address not corrent

Altera_Forum
Honored Contributor II
748 Views

In the demo attached the address outputed from  

Diff[0]=IORD(READBUF_BASE,8); 

Diff[1]=IORD(READBUF_BASE,9); 

were not correct.Can you tell me the reason?
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
75 Views

Please specify which are the actual output addresses. This is not clear from the picture, since there is no rd signal.

Reply