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Hello All,
I am trying to build a system using nios2, memory and a custom component with Avalon memory mapped interface. In the master side, it can be nios2 OR memory and the custom component is on the slave side. In the custom component, I have one slave port, it can be connected to more than one nios2 or memory. I hope arbitration between multiple masters & a single slave is automatically handled. But for my custom component functionalities, when signals come to slave port, I need to identify the master port (I mean where it is coming from). Can anyone help with this, please? Thanks. S.ArudchuthaLink Copied
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