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battery backup sram

Altera_Forum
Honored Contributor II
1,023 Views

Hi 

 

I'm working on Cyclon4Gx FPGA Project and I have a problem with the battery backup ram. Every time I reset the software the memory is always erased. In the past I worked on a similar cyclon 2 project and the memory was not erased after a reset. 

I'm using Quartus 2 12.1 and my code is located in on-chip-memory. Does anybody have a suggestion?
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3 Replies
Altera_Forum
Honored Contributor II
113 Views

Seems kind of obvious, but did you measure the battery voltage? Maybe it's just a dead battery.

Altera_Forum
Honored Contributor II
113 Views

The battery is ok, I did a couple of tests yesterday and I found that the data are cleared by system startup . If i save a variables with the IOWR instruction outside the map of linker the variables are not erased, I think the alt_load function erases all the section (.text .rwdata etc..) but i don't understand how to configure the bsp setting to avoid this. I have the reset vector , .text, . rwdata , .rodata and the other section in sram.

Altera_Forum
Honored Contributor II
113 Views

This sounds like a software issue. Check the compiler and linker manuals. There might be an option to not clear memory on start up.

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