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cfi flash : code error 8 from nios2 flash programmer

praveenkumar
Beginner
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error code:8
my project am using CycloneIV EP4CGX74CF23I7, am trying to flash my External NOR Flash(PC28F00BP30EF) in Nios II Flash Programmer but am getting this error 

 

 

 

Info: Mar 28, 2013 12:52:59 PM - (INFO) elf2flash: args = --input=E:/PCIE/NOR_FLASH/software/Hello/Hello.elf --output=E:/PCIE/NOR_FLASH/software/Hello_bsp/flash/Hello_cfi_flash_0.flash --boot=C:/altera/12.0/nios2eds/components/altera_nios2/boot_loader_cfi.srec --base=0x10000000 --end=0x20000000 --reset=0x10000000 --verbose 

 

Info: Mar 28, 2013 12:52:59 PM - (FINE) elf2flash: Starting 

 

Info: Mar 28, 2013 12:52:59 PM - (FINE) elf2flash: Done 

 

Info: Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 

 

Info: Resetting and pausing target processor: OK 

 

Info: Reading System ID at address 0x20005008: verified 

 

Info: no cfi table found at address 0x10000000 

 

Info: Original contents (after writing 0xF0 and 0xFF00FF to address 0x10000000): 

 

Info: 0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 10: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 30: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: Contents after writing 0x980098 to address 0x100000AA: 

 

Info: Same after writing 0x980098 to address 0x10000154: 

 

Info: Same after writing 0x00980098 to address 0x100002A8: 

 

Info: Same after writing 0x980098 to address 0x10000055: 

 

Info: Same after writing 0x980098 to address 0x100000AA: 

 

Info: Same after writing 0x00980098 to address 0x10000154: 

 

Info: Same after writing 0x980098 to address 0x10000154: 

 

Info: Same after writing 0x980098 to address 0x100002A8: 

 

Info: Same after writing 0x00980098 to address 0x10000550: 

 

Info: 0: 89 00 01 00 89 00 04 00 04 D8 04 D8 04 D8 04 D8 ................ 

 

Info: 10: 51 00 59 00 00 00 01 00 00 00 00 00 20 00 95 00 Q.Y......... ... 

 

Info: 20: 0A 00 00 00 02 00 00 00 01 00 0A 00 01 00 03 00 ................ 

 

Info: 30: 02 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF ................ 

 

Info: 40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: Ignored possible autoselect code 89-01 as no override data 

 

Info: present in section [FLASH-89-01] 

 

Info: Ignored possible autoselect code 0089-0001 as no override data 

 

Info: present in section [FLASH-0089-0001] 

 

Info: Ignored possible autoselect code 00010089-00040089 as no override data 

 

Info: present in section [FLASH-00010089-00040089] 

 

Info: leaving target processor paused 

 

error: error code: 8 for command: $SOPC_KIT_NIOS2/bin/nios2-flash-programmer "E:/PCIE/NOR_FLASH/software/Hello_bsp/flash/Hello_cfi_flash_0.flash" --base=0x10000000 --sidp=0x20005008 --id=0x0 --timestamp=1364451186 --device=1 --instance=0 '--cable=USB-Blaster on localhost [USB-0]' --program --verbose  

 

 

 

in this CFI Flash base address is automatically assigned in SOPC Builder, Reset Vector in Nios Processor is assigned to cfi_flash. 

but when i tried to read from flash  in c code by low level drivers

like IOWR and IORD   cfi flash  query missing at addres  ox11  instead of 0x52 its showing again 0x51.

  i am aso tried  with   flash over ride file its coming another error

device commands not compatible with the device size .

what can i do for this plz reply .

its been 10 days  posted no one is giving reply

 
 
 
 
 
 
 
 
 
 

 
 
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15 Replies
EricMunYew_C_Intel
Moderator
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Can you attach your .qsys or block diagram ?


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EricMunYew_C_Intel
Moderator
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Can you check and refer to the attached.


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EricMunYew_C_Intel
Moderator
2,325 Views

Can you check and refer to the attached.

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praveenkumar
Beginner
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yeah its the same way  i designed  in the qsys  and also   while  i writing to  flash  by following the datasheet procedure   .

ox4089  if i am writing this  16 bit  data in some 0x0 location

and while i am reading the location  0x0 its showing 0x89 and 0x1 location  its showing 0x40.

its showing lsb in 0x0 location and MSb in 0x1 location.

through code its reading  some cfi table locations according to datasheet.

so i think i correctley designed in qsys. and none of the above problems are solved .

 

thaks for reply.

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EricMunYew_C_Intel
Moderator
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Have you tried to program your flash using Quartus Programmer and PFL.

You can refer to below for PFL IP:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf


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praveenkumar
Beginner
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yeah that's working fine .

but i  dont want that ,i converted sof file to .flash file and write it in ox20000  onwards  by receiving the data in .flash file through uart but it is not booting on power on .

do we need to write other than  converted sof file to boot up on power on .

do i need to convert pof file to hex file and write that data from 0x20000 onwards  but pof file  is having other data than .sof file do we need convert pof file and write to flash i want to know that data  .

or any other suggestions . actually in all pdfs its mentioned we have to write from 0x20000 onwards

 

reply fastly man, i had no  time left.

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praveenkumar
Beginner
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ACtually  ,i connected tristate controller in qsys, and assigned pins in pin planner  and i programmed through quartus  programmer  but it is not booting  ,i tried all the methods given in handbook  setting the reset vector ans exception and also bsp settings nothing worked out.

Without generic controller  it is booting  by initializing the onchip memory with the hex file .

our flash is micron rc256p33tfe flash   in genric tristate controller  i applied intel pcp30256flash  but it is not boooting  .

our booting method is active parallel.  can i use tristate controller in active parallel .

thank u

 

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EricMunYew_C_Intel
Moderator
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You can refer to below.

https://fpgacloud.intel.com/devstore/platform/16.1.0/Standard/nios-ii-processor-booting-from-cfi-flash/

The PFL allows fast passive parallel but not active parallel.


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praveenkumar
Beginner
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then what ip supports active parallel .

can u  show the process for active parallel booting in cyclone iii fpga .

In cyclone iii fpga supports active parallel booting .i read it in the document .

help me with booting process for cyclone iii active parallel flash .

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EricMunYew_C_Intel
Moderator
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Yes Cyclone III supports active parallel. In active parallel, you can connect the DCLK from your Cyclone III to Micron flash.


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praveenkumar
Beginner
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in active parallel config we  can access flash through tristate controller right.

 

or  we have to use only  pfl .

 

we can program through nios2flash programmer also .i had seen in document.

 

only through pfl it is flashing when we initialize the memory content with hex file .

otherwise it is not working through tristate controller and nios2flash programmer .

 

 

can u tell me why  i want it through tristate controller  otherwise its not going to suit my aplication.will u please reply quickly.

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EricMunYew_C_Intel
Moderator
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pfl for flashing and tristate controller for data read write.


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praveenkumar
Beginner
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if we  rewrite the flashed program locations   from ox20000  through tristate controller  in same locations  by flash file

upon power  up  ,program will run or not???

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EricMunYew_C_Intel
Moderator
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You can't change the FPGA image and program locations after flashed.


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praveenkumar
Beginner
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hi,

why cant i change the FPGA image and program locations after flashed, if i want to  modify the program then there is no usb blaster after integration then i want to load the program through rs422 communication . how it is possible without modifying flash locations.

 

 

even if we load through  jtag  memory location contents will be changed.

please give me a solution for loading the program through uart-422 communication

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