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Valued Contributor III
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creating custom multiple registers

Hi, 

 

I am working on a project to create 32x16 register banks as custom components on the NIOS 2 processor.  

I am already able to create a single 32 bit register. However I am unable to extend it to 32x16. With the method I employed to implement this, it gives me an error saying the number of pins exceed the number of pins available on the fpga. 

 

Any help on this would be much appreciated!!
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Valued Contributor III
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Hi, 

 

1.Are you trying to create registers in your own IP and its ports exported it? 

Why can't you use on-chip memory for multiple register?by which we can archive read/write. 

No need of additional I/O. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Valued Contributor III
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Hi Anand, 

 

By on-chip memory, do you mean the PIOs? 

I basically need to store data received serially by the UART component on the NIOS2 into different registers.  

What would be the best way to implement this?
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Valued Contributor III
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Hi, 

 

1.After receiving the data you can store it in on chip memory.(Consider each memory address as registers and store data) 

https://www.youtube.com/watch?v=v6rhbvablo8 

https://www.youtube.com/watch?v=zfthoafi7ly 

(UART<->NIOS II<->on chip ram<->custom IP with memory Avalon Memory Mapped Interface) 

2.Are trying to get 32bitx16 of data parallelly from FPGA?  

You can use multiplexing by using only 32 pin for data or Use serial with one pin. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Valued Contributor III
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Hi,  

 

I am trying to get uart data serially from the FPGA and store in a custom register and later on use the register contents in a state machine. However, the uart data can vary in size and hence i am trying to have a 32x16 bit register. 

I tried following your suggestion, but since i need to use the uart data later on in my state machine i dont think using the on chip memory would help. Let me know if my assumption is right. 

 

Best Regards, 

smruthi
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Valued Contributor III
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You can definitely use an on-chip memory for that. You can even use a double port memory, with one port for writing from the UART and one port reading from your state machine. 

If your state machine just needs to read sequentially the data from the UART you could also use a FIFO instead, it would make your design simpler.
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Valued Contributor III
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But I am unabke to export the on chip memory. Is there any other way to do this?

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Valued Contributor III
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What do you mean by "export the on chip memory"? You can access the memory contents through its ports.

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Valued Contributor III
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Just to give you a clear picture of what I am doing, I will attach my code. 

 

For now I am not using the on-chip memory, I have created a 32x 16 bit registers. At least I think this is how it is done. And in my C code, I am using ISR to get uart data and store it into the register. However, when I read back the register contents, I get '0'.  

 

My C code is as follows, 

# include <stdio.h># include <string.h># include <unistd.h># include <alt_types.h># include <io.h># include<stdint.h># include "system.h"# include "sys/alt_irq.h"# include "InterruptHandlerForUart.h"# define BAUD_RATE_0 115200 

 

void InitUart() 

int context_uart1; 

InitUart1(BAUD_RATE_0); 

alt_irq_register(RS232_IRQ,&context_uart1,IsrUart1 );  

alt_irq_enable (RS232_IRQ); 

 

int main() 

 

InitUart(); 

while(1) { 

if(!EmptyUart1()) { 

IOWR_32DIRECT(NEW_COMPONENT1_0_BASE, 0, GetUart1()); 

PutUart1(IORD_32DIRECT(NEW_COMPONENT1_0_BASE, 0)); 

 

} //while 

return 0; 

 

 

I am sorry if am not very clear with the questions I am asking. I am quite new to FPGA and NIOS II programming. 

 

 

 

Thanks, 

Smruthi
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Valued Contributor III
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I suggest that you use signal tap on your module to check what's going on when your software writes to the register. Did you check the polarity of the reset signal? The name "resetn" suggest that it is asserted when 0, and it does so in your code, but I believe that if you don't end the name with _n (note the underscore) then QSys will assume it is a positive reset signal. You don't need to change the name of the signal now, but when you edit your component in Qsys, ensure that the signal type is set to "reset_n" and not "reset".

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Valued Contributor III
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Hi, 

 

Sorry I attached the wrong VHD file for the avalon interface. Here it is, 

 

LIBRARY ieee; 

use ieee.std_logic_1164.all; 

use ieee.numeric_std.all; 

use ieee.std_logic_signed.all; 

 

 

 

 

ENTITY reg16_avalon_interface IS 

PORT ( clock, resetn : IN STD_LOGIC; 

read, write, chipselect : IN STD_LOGIC; 

writedata : IN STD_LOGIC_VECTOR(31 DOWNTO 0); 

byteenable : IN STD_LOGIC_VECTOR(3 DOWNTO 0); 

readdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); 

address: IN Std_Logic_Vector(3 downto 0); 

Q_export : OUT STD_LOGIC_VECTOR(31 DOWNTO 0) ); 

END reg16_avalon_interface; 

 

 

 

 

 

 

ARCHITECTURE Structure OF reg16_avalon_interface IS 

type reg_type is array (16 downto 0) of std_logic_vector (31 downto 0); 

SIGNAL local_byteenable : STD_LOGIC_VECTOR(3 DOWNTO 0); 

SIGNAL to_reg, from_reg : reg_type; 

 

 

 

 

COMPONENT reg16 

PORT ( clock, resetn : IN STD_LOGIC; 

D : IN STD_LOGIC_VECTOR(31 DOWNTO 0); 

byteenable : IN STD_LOGIC_VECTOR(3 DOWNTO 0); 

Q : OUT STD_LOGIC_VECTOR(31 DOWNTO 0) ); 

END COMPONENT; 

 

 

BEGIN 

to_reg(to_integer(unsigned(address))) <= writedata; 

WITH (chipselect AND write) SELECT 

local_byteenable <= byteenable WHEN '1', "0000" WHEN OTHERS; 

reg_instance: reg16 PORT MAP (clock, resetn, to_reg(to_integer(unsigned(address))), local_byteenable, from_reg(to_integer(unsigned(address)))); 

readdata <= from_reg(to_integer(unsigned(address))); 

Q_export <= from_reg(to_integer(unsigned(address))); 

END Structure; 

 

 

I think I am going wrong with the way I am specifying the address signal. But I am not entirely sure how to implement this. 

 

 

 

-Smruthi
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Valued Contributor III
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I think you are complicating your code, you should only need one array. I'd advise you to either run your code in a simulator or use signaltap to see exactly what is happening.

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Valued Contributor III
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Okay, thank you for the promt replies!

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