Nios® II Embedded Design Suite (EDS)
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critical warning

Honored Contributor II



after fitting, get critical warning like below, any suggestion to get rid of it? 


Critical Warning: Fitter could not properly route signals from DQ I/Os to DQ capture registers because the DQ capture registers are not placed next to their corresponding DQ I/Os 

Info: DQ capture register CSi_Core:inst|DDR2:the_DDR2|DDR2_controller_phy:DDR2_controller_phy_inst|DDR2_phy:DDR2_phy_inst|DDR2_phy_alt_mem_phy:DDR2_phy_alt_mem_phy_inst|DDR2_phy_alt_mem_phy_clk_reset:clk|altddio_bidir:DDR_CLK_OUT[0].ddr_clk_out_p|ddio_bidir_n5h:auto_generated|input_cell_h[0] at (38, 2) is not assigned to the adjacent LAB of the corresponding DQ I/O CSi_Core:inst|mem_clk_to_and_from_the_DDR2[0]~input at (34, 0)
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