cyclone III starter kit & DMA / DDR problem

Altera_Forum · ‎06-28-2011

Hi,

I use a cycIII starter kit : DDR 32MB x16 (http://www.altera.com/products/devkits/altera/kit-cyc3-starter.html).

I would like to use dma to rd/wr data to the DDR memory and measure timings with alt_timestamp().

I have modified a bit the file ddr_test.c provided by the ddr tutorial :

http://www.altera.com/literature/hb/external-memory/emi_tut_ddr.pdf

Here is my code to manage DMA :

# define length 512

IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_0_BASE, 0x00000000);

IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_0_BASE, 0x00000082);

//DMA go bit is set to zero.

IOWR_ALTERA_AVALON_DMA_STATUS(DMA_0_BASE, 0x00000000);

//clearing done bit

IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_0_BASE,read_DMA_address);

IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_0_BASE,write_DMA_address);

IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_0_BASE,(length*2));

printf(" Starting DMA engine \n");

IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_0_BASE, 0x0000008A);

I attached a capture of my sopc.

Direct read and write to the DDR work, but not DMA accesses :

When I use:

- read_dma_addr=00000000 = onchip_mem base addr, connected to dma read and write ports

- write_dma_addr=03200000 = altmemphy ddr base addr connected to dma read and write ports

even if I invert read and write dma_addr, dma transfert always failed (verification with memcmp()).

If I invert addr, console menu display random characters (see console.jpg).

I don't understand the problem.

thanks for your help.

Sebastien G

Altera_Forum · ‎07-04-2011

I don't know why but it works now, memcmp() verification gives a good result.

Beware where bsp editor put some part of your code ! I put reset and exception vector in sram but other parts of my code were in ddr. so that's the reason of my graphical problems, printf contents were erase by ddr write operations...

Altera_Forum · ‎07-04-2011

Possibly the cpu was accessing cached data.