designing MIPS processr

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designing MIPS processr

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I got some problem(s). I need to implement a MIPS processor with the following arrangement:

R-type [op][rd][rs][rt]. where op = rs = rd = rt = 2 bits.

branch [op][rd][rs][imm]. where op = rs = rd = rt= imm = 2 bits,

In my understanding, this would be an 8 bit processor. Now I'm trying to generate alu control signals since we do not have funtion opcode(the LSBs after registers have been extracted, eg in R-format)? :confused::eek:

Your assistance would greatly be appreciated.

Thx

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