.elf file explained?

[Altera_Forum]

Hello! 

 I have just watched the ALTERA Embedded Design Flow video tutorial and at some point at the end it is explained how the user can program a flash memory with:  - A boot loader - The FPGA .sof image - The .elf file  and I was wondering what is the structure of a sof file (less important for me) and most important what is the structure of an .elf file.  I mean after the compilation there are stack, heap, code and data segments? And what does each of them represent? Also Is the elf file directly copied as is into the flash or is it restructured before saved to flash (in other words does Nios execute the actual elf file as it is?)?

[Altera_Forum]

I wasn't trying very hard, at the moment the priorities have moved away from field upgrades - one that I'm sure will bite back. 

I'd noticed that the epcs boot code contained a different block of spi logic to the normal spi block - since it exposed the 'data available' line that dma would need. I don't remember seeing the ATLASMI_PARALLEL block (is that a typo as well)?

[Altera_Forum]

Yes, it's a typo. 

It's ALTASMI_PARALLEL